TLC NAND Flash Memory Data Writing Method for Reliability
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Solution Overview
Problem
The reliability of Trinary Level Cell (TLC) NAND flash memory modules is lower than Single Level Cell (SLC) and Multi Level Cell (MLC) flash memory modules due to difficulties in correctly identifying threshold voltage distribution, leading to potential erroneous data storage.
Innovation Solution
A data writing method that generates and encodes data streams to be written into specific storage states of memory cells in a TLC NAND flash memory module, using a memory control circuit unit to program memory cells into a limited set of storage states, increasing the difference in gate voltages between states and enhancing data reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Quantity of substance
If TLC NAND flash memory module is used to increase storage capacity, then storage capacity is improved, but reliability deteriorates due to difficulty in correctly identifying threshold voltage distribution
Solution Approach 1:
The patent changes the parameter of storage states from all possible 8 states to a limited subset of 4 states (000, 011, 101, 110). This parameter change reduces the complexity of threshold voltage identification while maintaining high storage capacity through the trinary level cell structure, thereby resolving the contradiction between capacity and reliability.
Solution Approach 2:
The patent segments the 8 possible storage states into 4 selected states, effectively dividing the state space. This segmentation makes the threshold voltage distribution more manageable and identifiable, reducing the risk of erroneous state identification while preserving the high capacity benefit of TLC cells.
2Reliability
If SLC or MLC flash memory modules are used to improve reliability, then reliability is improved, but production cost increases
Solution Approach 1:
The patent modifies the operational parameters of TLC cells by limiting them to 4 specific storage states instead of using all 8 possible states. This parameter adjustment enables TLC cells to achieve reliability levels comparable to SLC/MLC while maintaining the lower production cost advantage of TLC technology.
Solution Approach 2:
The patent applies partial action by utilizing only a subset (4 out of 8) of the possible storage states. This partial utilization simplifies the threshold voltage distribution enough to achieve reliable data storage while avoiding the need to manufacture more complex SLC or MLC structures.
3Quantity of substance
If all 8 storage states are used in TLC memory cells, then storage density is maximized, but read margin in voltage distribution decreases leading to erroneous state identifications
Solution Approach 1:
The patent changes the parameter of active storage states from 8 to 4, which directly increases the read margin in voltage distribution. This parameter change provides sufficient voltage separation between states for accurate identification while maintaining high storage density through the trinary level cell architecture.
Solution Approach 2:
The patent segments the voltage distribution spectrum into 4 distinct regions corresponding to the selected storage states. This segmentation creates clear voltage thresholds for state identification, eliminating the read margin problems that occur when all 8 states are used, while still achieving high storage density.
Data Source
AI summary
A data writing method for a rewritable non-volatile memory module having a plurality of physical erasing units and a memory control circuit unit and a memory storage apparatus using the same are provided. Each of the physical erasing units has a plurality of physical programming unit sets, and each of the physical programming unit sets has a plurality of physical programming unit. The method includes receiving data and arranging the data to generate a first data stream and a second data stream. The method also includes encoding the first data stream and the second data stream to generate a third data stream, and issuing a programming command sequence to write the first data stream, the second data stream and the third data stream respectively into a first physical programming unit, a second physical programming unit and a third physical programming unit of a physical programming unit set.