Transaction Layer Packet Address Compaction for Signal Integrity

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Solution Overview

Problem

Existing interconnects for transaction layer packets improve bandwidth but compromise signal integrity, and error correction codes, while enhancing integrity, impose significant encoding overhead, degrading system performance.

Innovation Solution

A method and apparatus for compacted addressing of transaction layer packets that identify and remove low entropy address bits, allowing these bits to be reclaimed and used for error correction or other data integrity purposes without increasing packet size, by maintaining counters for each address bit, determining low entropy bits, storing them in bitmask and bit array registers, and synchronizing these with recipient registers to regenerate memory addresses.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If error correction codes are added to improve signal integrity, then reliability is improved, but device complexity increases due to encoding overhead

Engineering Contradiction:
Improvesignal integrityVSAvoidencoding overhead
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts low entropy address bits from the full address and separates them into a dedicated field in the TLP header. This extraction allows the main address data to be transmitted more efficiently while the separated low entropy bits can be used for error correction purposes without adding overall overhead to the packet size.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent embeds the low entropy address bits within the TLP header structure itself, nesting this information within the existing packet format. This nested structure allows error correction data to be incorporated without increasing the overall packet size, as the low entropy bits are integrated into the existing header rather than added as separate overhead.

Inventive Principle:
Principle #7Nested doll (Nesting)

2Reliability

If more data is transmitted to improve signal integrity, then reliability is improved, but loss of time increases due to larger packet size

Engineering Contradiction:
Improvesignal integrityVSAvoidtransmission time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

By extracting low entropy address bits from the full address and placing them in a dedicated field, the patent enables error correction functionality without increasing the total packet size. The extraction separates address information into components that can be used for integrity checking without adding transmission overhead.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent identifies and discards redundant address bits (low entropy bits that provide minimal information) from the main address stream, then recovers their value by using them as error correction data. This discarding and recovering process maintains reliability while avoiding the time penalty of transmitting additional redundant data.

Inventive Principle:
Principle #34Discarding and recovering

3Reliability

If error correction codes are implemented, then reliability is improved, but productivity decreases due to processing overhead

Engineering Contradiction:
Improvesignal integrityVSAvoidsystem performance
Core Design Contradiction:
ReliabilityVSProductivity

Solution Approach 1:

The extraction of low entropy address bits creates a streamlined error correction mechanism that requires minimal processing. By taking out only the necessary low entropy bits rather than processing entire error correction codes, the system maintains reliability while minimizing the productivity impact of error correction processing.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The patent uses a lightweight error correction approach based on simple bit analysis rather than complex error correction codes. This disposable, low-cost method provides sufficient reliability for the application while avoiding the heavy processing overhead associated with traditional error correction implementations.

Inventive Principle:
Principle #27Cheap short-living objects (Disposable)

Data Source

PatentUS11868778B2Compacted addressing for transaction layer packets
Publication Date: 2024.01.09 ADVANCED MICRO DEVICES INC
  • US11868778B2 patent drawing
  • US11868778B2 patent drawing
  • US11868778B2 patent drawing

AI summary

Compacted addressing for transaction layer packets, including: determining, for a first epoch, one or more low entropy address bits in a plurality of first transaction layer packets; removing, from one or more memory addresses of one or more second transaction layer packets, the one or more low entropy address bits; and sending the one or more second transaction layer packets.