TMDC Semiconductor Layer Patterning via Surface Energy Regions

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Existing methods for manufacturing semiconductor layers face challenges in achieving ease of production and reliability, particularly in creating precise patterns with transition metal dichalcogenides (TMDCs) for flexible and transparent electronic devices.

Innovation Solution

A method involving the formation of an insulating layer with distinct hydrophilic and hydrophobic regions through an oxygen plasma process, followed by deposition of a metal mask and subsequent oxygen plasma treatment to create a semiconductor layer with enhanced surface energy differences, allowing precise patterning and reliable semiconductor layer formation.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional semiconductor layer manufacturing methods are used, then production can proceed with standard processes, but manufacturing precision and reliability are insufficient for creating precise patterns with TMDCs

Engineering Contradiction:
Improvepatterning precisionVSAvoidprocess complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The method performs preliminary surface treatment by forming an insulating layer with differentiated surface energy regions before semiconductor layer deposition. The oxygen plasma treatment is applied in advance to create hydrophilic and hydrophobic regions on the insulating layer surface, which guides subsequent semiconductor material deposition to precise locations, thereby improving patterning precision without requiring complex post-processing steps

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The insulating layer is engineered to have non-uniform surface properties with distinct hydrophilic and hydrophobic regions. This local differentiation in surface energy allows selective adhesion of semiconductor materials to specific areas, enabling precise pattern formation. The metal mask is also used to create localized treatment zones during oxygen plasma processing, further enhancing spatial control over the semiconductor layer formation

Inventive Principle:
Principle #3Local quality

2Reliability

If ease of manufacture is prioritized with simple processes, then production is simpler, but reliability of semiconductor layer formation decreases

Engineering Contradiction:
Improvesemiconductor layer formation reliabilityVSAvoidmanufacturing simplicity
Core Design Contradiction:
ReliabilityVSEase of manufacture

Solution Approach 1:

The differentiated surface energy regions on the insulating layer self-direct the semiconductor material deposition process. The hydrophilic regions naturally attract and retain semiconductor precursors while hydrophobic regions repel them, creating self-aligned patterns without requiring complex external guidance systems. This self-organizing behavior improves reliability while keeping the manufacturing process relatively simple

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The insulating layer with differentiated surface energy acts as an intermediary between the substrate and the semiconductor layer. It mediates the deposition process by providing a controlled interface that directs material placement, ensuring reliable semiconductor layer formation. The oxygen plasma treatment creates this intermediary structure with specific surface properties that facilitate controlled material deposition

Inventive Principle:
Principle #24Intermediary (Mediator)

3Manufacturing precision

If metal mask thickness is increased to improve pattern definition, then patterning precision improves, but manufacturing complexity and material usage increase

Engineering Contradiction:
Improvepattern definition precisionVSAvoidmetal mask material usage
Core Design Contradiction:
Manufacturing precisionVSQuantity of substance

Solution Approach 1:

The method optimizes the metal mask thickness parameter to a specific range (50-150 nm) that provides sufficient pattern definition while minimizing material consumption. This thickness is carefully selected to be thick enough to withstand oxygen plasma treatment and provide good pattern fidelity, but thin enough to reduce material usage and simplify subsequent mask removal processes

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

Enables easy and reliable manufacturing of semiconductor layers with improved precision and accuracy, facilitating the production of flexible and transparent transistors with enhanced electrical properties.

Implementation Method 1

An oxygen plasma process is performed on the metal mask

Methodology Applied
Scientific EffectPlasma: Plasma

Implementation Method 2

Through the oxygen plasma process, the insulating layer may include a first region and a second region having different surface energies from each other

Methodology Applied
Scientific EffectSurface energy modification: Surface Tension

Implementation Method 3

The precursor and the reactant may react to form a semiconductor layer having a layered structure on the first region

Methodology Applied
Scientific EffectChemical reaction: Chemical Bonding

Data Source

PatentUS20250359106A1Manufacturing method of semiconductor layer and transistor comprising the semiconductor layer
Publication Date: 2025.11.20 SAMSUNG DISPLAY CO LTD
  • US20250359106A1 patent drawing
  • US20250359106A1 patent drawing
  • US20250359106A1 patent drawing

AI summary

A method of manufacturing a semiconductor layer includes preparing an insulating layer comprising a silicon oxide. A metal mask is formed on the insulating layer. An oxygen plasma process is performed on the metal mask. The metal mask is removed. The insulating layer is loaded into a chamber to form a semiconductor layer.