TMDS Receiver Termination Circuit with Cascaded Transistors

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Solution Overview

Problem

Existing systems for transition-minimized differential signaling (TMDS) face challenges in managing termination paths for both NMOS and PMOS devices, particularly in the absence of a sink supply, requiring complex circuitry and failing to work effectively for supply-referred termination units.

Innovation Solution

The proposed solution involves an integrated circuit with a cascaded configuration of transistors and resistors along a termination path, using 1.8V MOSFETs and a 3.3V voltage supply, which includes calibration code control and a bulk generation circuit with peak detector circuitry to adjust output impedance and reduce leakage, suitable for HDMI systems.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a cascade topology is used to protect 1.8V devices from 3.3V supply, then device protection is improved, but the solution does not work for supply-referred termination using PMOS devices

Engineering Contradiction:
Improvedevice protectionVSAvoidtermination unit compatibility
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The patent implements dynamic gate control for the PMOS device in the termination unit. The gate voltage is dynamically adjusted based on the supply state: when AVCC is present, the gate is driven to turn off the PMOS device to protect against overstress; when AVCC is absent, the gate control is adjusted to allow proper termination function. This dynamic adaptation resolves the contradiction between protection and compatibility.

Inventive Principle:
Principle #15Dynamics

2Reliability

If dynamic gate control is used to interface with 3.3V domain, then voltage tolerance is improved, but extra complex circuitry is required

Engineering Contradiction:
Improvevoltage toleranceVSAvoidcircuitry complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent combines the gate control functionality with the existing termination unit structure. The dynamic gate control is integrated into the termination circuit rather than being a separate complex control system. The gate control logic is merged with the supply detection mechanism, allowing voltage tolerance improvement while minimizing additional circuitry complexity.

Inventive Principle:
Principle #5Merging (Combining)

3Adaptability or versatility

If PMOS devices are used in termination unit for supply-referred termination, then termination functionality is improved, but gate voltages must be generated to turn off termination in absence of sink supply

Engineering Contradiction:
Improvetermination unit functionalityVSAvoidgate voltage generation
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The patent implements a self-service mechanism where the termination unit automatically manages its own gate voltage state based on the supply condition. The circuit detects the absence of AVCC supply and autonomously adjusts the gate voltage to turn off the PMOS device, eliminating the need for external gate voltage generation circuitry. This self-managing approach maintains functionality while reducing complexity.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS10177940B1System and method for data transmission
Publication Date: 2019.01.08 CADENCE DESIGN SYST INC
  • US10177940B1 patent drawing
  • US10177940B1 patent drawing
  • US10177940B1 patent drawing

AI summary

The present disclosure relates to an apparatus for use in a transition-minimized differential signaling link (“TMDS”) receiver. The apparatus may include an integrated circuit electrically connected with a voltage supply. The integrated circuit may include a first transistor, a second transistor, and a resistor arranged in a cascaded configuration along a termination path. The first transistor may include calibration code control configured to adjust an output impedence.