TMR Memory Device Series-Connected for Sensor Chip Area Reduction
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Solution Overview
Problem
Conventional memory solutions for sensor chips are either large in size or require CMOS front-end processing, which is not necessary for manufacturing other sensor parts and increases chip area, leading to a need for a more area-efficient alternative.
Innovation Solution
A magnetic memory device utilizing a series-connected tunnel magnetoresistive (TMR) element configuration that can be integrated within a TMR processing block, allowing for simultaneous fabrication with sensors and minimal chip area usage, using a programming circuit to set resistance states for data storage.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If conventional memory solutions (EEPROM, flash memory, diode fuses) are used to store data on sensor chips, then data storage capability is achieved, but chip area increases and/or CMOS front-end processing is required
Solution Approach 1:
The patent merges the memory function with the TMR sensor fabrication process by using TMR elements as both sensing components and memory storage units. The same TMR processing block that produces sensors also creates the memory device, eliminating the need for separate memory structures and reducing overall chip area.
Solution Approach 2:
The TMR element serves dual purposes: it functions as both a magnetic sensor component and a memory storage element. By making the TMR element multi-functional, the patent eliminates the need for dedicated separate memory structures, thereby reducing chip area while maintaining data storage capability.
2Reliability
If conventional memory solutions (EEPROM, flash memory) are used to store data on sensor chips, then data storage capability is achieved, but CMOS front-end processing is required which is not necessary for sensor manufacturing
Solution Approach 1:
The patent combines the memory formation process with the TMR sensor fabrication process. Both the sensor and memory components are created using the same TMR processing steps, eliminating the need for separate CMOS front-end processing and simplifying the overall manufacturing complexity.
Solution Approach 2:
The TMR processing block performs dual functions: it manufactures both the magnetic sensor components and the memory storage elements. This universal processing approach eliminates the need for additional CMOS processing steps, reducing device complexity while achieving data storage capability.
3Reliability
If laser fuses or diode fuses are used for data storage, then data storage capability is achieved, but the device size becomes large or large currents are required for operation
Solution Approach 1:
The patent changes the operational parameter from high current (required by diode fuses) to voltage-based TMR resistance switching. The memory state is changed by applying voltage to switch between high and low resistance states of the TMR element, significantly reducing operational energy requirements compared to conventional fuse-based solutions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
Enables efficient storage of data with minimal chip area, facilitating accurate control of system states and reducing production costs by integrating memory and sensor functions on a semiconductor chip without significant area consumption.
Implementation Method 1
a memory circuit (110) comprising a first tunnel magnetoresistive (TMR) element (111) and a second TMR element (112) coupled in series
Data Source
AI summary
A magnetic memory device is provided. The magnetic memory device includes a memory circuit comprising a first tunnel magnetoresistive element and a second tunnel magnetoresistive element coupled in series. An input node of the magnetic memory device is coupled to the first tunnel magnetoresistive element, wherein the input node is configured to receive a voltage signal. The first tunnel magnetoresistive element initially holds a first resistance value, wherein the first tunnel magnetoresistive element is short-circuited to hold a second resistance value after the voltage signal is received by the input node. End nodes of the memory circuit are coupled to defined voltages in a read mode. The magnetic memory device further includes a read-out circuit configured to measure a voltage at a sensing node in the read mode. The sensing node is interconnected between the first tunnel magnetoresistive element and the second tunnel magnetoresistive element.