Undersized T-Leg Switches in TNPC Inverters

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Solution Overview

Problem

Existing three-level inverters require equal die area and current rating for all switches, leading to inefficiencies and increased system size and cost, particularly in applications with large peak power to average power ratios like electric vehicles.

Innovation Solution

A three-level T-type neutral point clamp (TNPC) inverter design with undersized T-leg switches compared to standard switches, allowing operation in both three-level and two-level modes based on current thresholds, reducing die area and current rating requirements.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Loss of energy

If all switches are given equal die area and current rating to achieve high efficiency across the whole load range, then efficiency is improved, but device complexity and cost increase due to larger required die area

Engineering Contradiction:
ImproveefficiencyVSAvoiddie area
Core Design Contradiction:
Loss of energyVSArea of stationary object

Solution Approach 1:

The patent applies local quality by differentiating the die area and current rating of switches based on their specific functional requirements. The first and second switches (handling full DC bus voltage) are given larger die area, while the third and fourth switches (handling only capacitor voltage) are given smaller die area. This localized optimization allows each switch to be appropriately sized for its actual workload, improving overall efficiency while reducing total die area and cost.

Inventive Principle:
Principle #3Local quality

2Reliability

If equal current rating is provided to all switches, then reliability is improved across all operating conditions, but device complexity increases due to uniform high-specification design

Engineering Contradiction:
Improveswitch reliabilityVSAvoidswitch specification uniformity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent implements local quality by assigning different current ratings to different switches based on their specific operational demands. The first and second switches are designed with higher current ratings to handle full DC bus voltage during high-power operation, while the third and fourth switches use lower current ratings sufficient for capacitor voltage handling. This differentiated approach ensures each switch is reliably sized for its actual workload, maintaining system reliability while reducing device complexity.

Inventive Principle:
Principle #3Local quality

3Object-generated harmful factors

If three-level operation mode is used at light loads, then voltage distortion and harmonics are reduced, but system complexity increases due to mode switching requirements

Engineering Contradiction:
Improvevoltage distortion and harmonicsVSAvoidoperation mode complexity
Core Design Contradiction:
Object-generated harmful factorsVSDevice complexity

Solution Approach 1:

The patent applies dynamics by implementing dynamic mode switching between three-level and two-level operation based on real-time load conditions. The controller automatically selects three-level mode during light-load operation to minimize voltage distortion and harmonics, while switching to two-level mode during high-power operation. This dynamic adaptation optimizes performance across varying operating conditions while managing system complexity through intelligent control.

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS20250226763A1Three-level inverter power module with multiple operation modes
Publication Date: 2025.07.10 ATIEVA INC(US)
  • US20250226763A1 patent drawing
  • US20250226763A1 patent drawing
  • US20250226763A1 patent drawing

AI summary

A three-level T-type neutral point clamp (TNPC) inverter comprises: a first direct current (DC) terminal and a second DC terminal; a first capacitor and a second capacitor electrically connected in series between the first and second DC terminals; and first, second and third circuitry legs, each of the first, second and third circuitry legs including i) switches electrically connected in series between the first and second DC terminals, and ii) a T-leg switch electrically connected between a point between the first and second capacitors and a point between the switches, wherein the T-leg switch is undersized compared to the switches.