Time-of-Day Counter Synchronization via Control Plane Time Stamps
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Solution Overview
Problem
Existing systems face challenges in synchronizing 1 Pulse Per Second (PPS) signals across distributed systems due to the need for multiple dedicated communications paths and unequal path lengths, leading to misalignments and uncertainty in timing synchronization.
Innovation Solution
Utilizing a control plane for time stamp exchanges between line cards to synchronize time of day counters, eliminating the need for dedicated PPS signals and compensating for path length differences through bidirectional buffers and high-resolution time stamping.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If separate dedicated communications paths are used for every 1 PPS signal source, then timing synchronization reliability is improved, but device complexity and cost increase due to multiple dedicated paths
Solution Approach 1:
The patent combines multiple 1 PPS signal transmissions into a single shared communications path by time-interleaving the signals. Instead of requiring separate dedicated paths for each signal source, the system multiplexes multiple PPS signals onto one path, reducing the number of physical connections while maintaining synchronization reliability through precise time-stamping and reconstruction at the receiving end.
2Reliability
If separate dedicated communications paths are used for every 1 PPS signal source, then timing synchronization accuracy is improved, but loss of substance increases due to multiple dedicated paths
Solution Approach 1:
The patent merges multiple dedicated communications paths into a single shared path using time-interleaved multiplexing. This reduces the consumption of physical communications resources such as cables, connectors, and channel bandwidth while maintaining timing accuracy through high-resolution time-stamping that compensates for the shared path environment.
3Device complexity
If control plane is used for time stamp exchange, then device complexity is reduced by eliminating dedicated PPS paths, but measurement precision may be affected by shared channel uncertainty
Solution Approach 1:
The patent implements a feedback mechanism where time-stamps are exchanged bidirectionally between the control plane and line cards. By measuring the round-trip time and comparing transmitted versus received time-stamps, the system can calculate and compensate for delays introduced by the shared control plane channel, thereby maintaining measurement precision despite using a shared communications path.
Solution Approach 2:
The patent replaces the traditional mechanical/electrical dedicated PPS signal paths with a software-based time-stamping and processing system running over the control plane. This substitution uses digital time-recording and computational delay compensation rather than physical dedicated signal routes, reducing hardware complexity while maintaining precision through software-based corrections.
4Device complexity
If time-interleaved shared bus is used instead of dedicated paths, then device complexity is reduced, but manufacturing precision challenges arise in achieving <1 ns alignment
Solution Approach 1:
The patent uses feedback-based delay measurement and compensation to achieve precise time alignment. By exchanging time-stamps and calculating actual transmission delays, the system can programmatically adjust timing parameters to compensate for variations in the shared bus characteristics, achieving <1 ns alignment precision without requiring extremely tight manufacturing tolerances on the physical infrastructure.
Data Source
AI summary
A control plane, available to all of the line cards in a system, is used to exchange time stamps to align the Time of Day counters in the master line cards. The master line cards are locked to a system clock distributed over the backplane by a timing card. The timing card is locked to timing of a slave line card that is synchronized with the grand master. Each master line card synchronizes updating its Time of Day counter based on a time stamp exchange and a local clock locked to the system clock and without the use of a 1 pulse per second signal.