ToF Histogram Counters Using Analog Bins for Low-Power 3D Sensing
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Solution Overview
Problem
Current time-of-flight (ToF) systems face challenges in efficiently generating accurate 3D-depth maps due to limitations in histogram generation speed, power consumption, and area requirements, particularly in large sensor arrays.
Innovation Solution
The implementation of a ToF system that utilizes charge transfer amplifier (CTA)-based analog counters and single photon avalanche diodes (SPADs) with digital addressing and a shared analog-to-digital converter (ADC) for histogram bin count determination, allowing for low power operation and compact design.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If digital counters are used for histogram generation in ToF systems, then histogram generation speed is improved, but power consumption and area increase
Solution Approach 1:
The patent replaces digital counters with analog counters that use continuous voltage levels to represent histogram bin counts. This substitution eliminates the need for digital switching operations, significantly reducing power consumption while maintaining fast histogram generation capability through direct voltage charging and reading operations.
Solution Approach 2:
The patent changes the representation parameter from digital discrete values to analog continuous voltage levels. Each histogram bin is represented by a voltage level on a capacitor, allowing for compact storage and low-power operation while enabling fast readout through simultaneous voltage sampling.
2Productivity
If digital counters are used for histogram generation in ToF systems, then histogram generation speed is improved, but device area increases
Solution Approach 1:
The patent replaces area-intensive digital counter circuits with compact analog voltage storage elements (capacitors). This substitution dramatically reduces the area required for histogram generation while maintaining high-speed performance through parallel voltage sampling and reading operations.
Solution Approach 2:
The patent implements a shared ADC that serves multiple histogram bins simultaneously, allowing one ADC to read out counts for all bins in parallel. This universal resource sharing further reduces the overall device area while maintaining fast histogram generation capability.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables fast histogram generation speeds comparable to SRAM or parallelized counter implementations, while reducing power consumption and area, facilitating the use of large ToF sensor arrays with improved linearity and reduced noise.
Implementation Method 1
A photon may generate a carrier in the SPAD through the photo electric effect.
Implementation Method 2
The photo generated carrier may trigger an avalanche current in one or more of the SPADs in an SPAD array.
Data Source
AI summary
In an embodiment, a method includes: resetting respective count values of a plurality of analog counters to an initial count value, each analog counter of the plurality of analog counters corresponding to a histogram bin of a time-of-flight (ToF) histogram; after resetting the respective count values, receiving a plurality of digital addresses from a time-to-digital converter (TDC); during an integration period, for each received digital address, selecting one analog counter based on the received digital address, and changing the respective count value of the selected one analog counter towards a second count value by a discrete amount, where each analog counter has a final count value at an end of the integration period; and after the integration period, determining an associated final bin count of each histogram bin of the ToF histogram based on the final count value of the corresponding analog counter.