ToF Image Sensor With Multi-Phase Demodulation Signal Lines

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Solution Overview

Problem

ToF-based image sensors generate noise in distance measurements due to various factors, leading to inaccurate distance information, necessitating a reduction in noise to improve accuracy.

Innovation Solution

An image sensor design incorporating a demodulation clock generation circuit generating multiple-phase demodulation clock signals, a buffer circuit with signal lines, and a pixel array with multiple taps to receive these signals, ensuring each signal is conducted during specific integration time sections, minimizing mismatching and noise.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Measurement precision

If multiple-phase demodulation clock signals are generated and distributed through separate signal lines, then measurement precision is improved by reducing noise and mismatching, but device complexity increases due to additional signal lines and circuit components

Engineering Contradiction:
Improvedistance measurement accuracyVSAvoidsignal line and circuit complexity
Core Design Contradiction:
Measurement precisionVSDevice complexity

Solution Approach 1:

The patent divides the demodulation clock signal distribution into multiple separate signal lines, with each line carrying a specific phase signal (e.g., first demodulation clock signal, second demodulation clock signal, etc.). This segmentation allows each signal line to be optimized for its specific phase, reducing interference and mismatching between signals, thereby improving distance measurement accuracy despite increasing the number of signal lines.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces a temporal dimension by distributing different phases of demodulation clock signals through separate signal lines simultaneously. Instead of multiplexing signals in time, the system uses spatial separation (different signal lines) to carry different phase signals, allowing parallel transmission without interference. This dimensional approach reduces signal mismatching while managing complexity through structured organization.

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Measurement precision

If demodulation clock signals are distributed through separate signal lines for each phase, then measurement precision is improved by minimizing signal mismatching, but manufacturing complexity increases due to additional circuit components and signal lines

Engineering Contradiction:
Improvedepth information precisionVSAvoidmanufacturing complexity
Core Design Contradiction:
Measurement precisionVSEase of manufacture

Solution Approach 1:

The patent segments the demodulation clock signal generation and distribution system into multiple independent components: a demodulation clock generation circuit that produces multiple phases, and separate signal lines for each phase. This segmentation allows each component to be manufactured and tested independently, then assembled into the final system. The modular approach, while increasing the number of components, simplifies the manufacturing process compared to a monolithic design.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent designs the demodulation clock generation circuit to produce multiple phases (first, second, third, fourth demodulation clock signals) that can be distributed through the respective signal lines to multiple pixels. This universal design allows the same generation circuit to serve multiple functions and pixels, reducing the need for separate generation circuits for each pixel and thereby reducing overall manufacturing complexity despite the increased number of signal lines.

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12464267B2Image sensor and camera module including the same
Publication Date: 2025.11.04 SAMSUNG ELECTRONICS CO LTD
  • US12464267B2 patent drawing
  • US12464267B2 patent drawing
  • US12464267B2 patent drawing

AI summary

An image sensor is disclosed. The image sensor includes: a demodulation clock generation circuit configured to generate M demodulation clock signals having N phases; a buffer circuit including M signal lines configured to transfer each of the M demodulation clock signals; and a pixel array including a plurality of pixels, wherein a pixel of the plurality of pixels has M taps and is configured to receive M demodulation signals passing through the M signal lines as inputs. Each of the M demodulation signals is conducted by each of the M signal lines during an integration time of one frame of the pixel, and M and N are integers greater than or equal to 2.