Controllable Transfer Gate for Time-of-Flight Pixel Charge Management
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Solution Overview
Problem
Existing time-of-flight pixel designs in 3D TOF camera systems face challenges in efficiently managing photogenerated charge carriers, leading to space constraints and inefficiencies in demodulation and discharge processes.
Innovation Solution
A modified time-of-flight pixel with a controllable transfer region between the mixing and storage regions, utilizing modulation gate voltage to control the transfer region into an open or locked state, allowing selective discharge of charge carriers into storage or discard nodes, thereby reducing space requirements and enabling fast switching between integration and discard modes.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If separate control mechanisms are used for transfer gate and modulation gate, then control precision is improved, but device complexity increases
Solution Approach 1:
The modulation gate is designed to perform dual functions: its primary function of modulating the electric field for charge carrier separation, and a secondary function of controlling the transfer region impedance state. By applying different voltage levels (first voltage for open state, second voltage for closed state), the same gate structure achieves both modulation and transfer control, eliminating the need for a separate transfer gate control mechanism while maintaining precise control over charge carrier flow.
Solution Approach 2:
The control functions of the transfer gate and modulation gate are merged into a single control mechanism. The modulation gate voltage simultaneously controls both the modulation field and the transfer region accessibility. This consolidation reduces the number of independent control circuits and gate structures, simplifying the overall device architecture while preserving the ability to precisely manage charge carrier transfer and modulation processes.
2Measurement precision
If additional control circuits are added for transfer gate, then control precision is improved, but space requirements increase
Solution Approach 1:
The modulation gate structure is designed to fulfill multiple roles without requiring additional dedicated control circuits or gate structures. By utilizing the modulation gate's voltage control capability to also regulate transfer region impedance, the patent eliminates the need for separate transfer gate control circuitry, thereby reducing the overall circuit area and pixel footprint while maintaining precise control over charge carrier management.
Solution Approach 2:
The control functions previously requiring separate circuits for transfer gate and modulation gate are merged into a single integrated control approach. This consolidation reduces the total number of control lines, transistors, and associated circuitry needed in each pixel, directly reducing the space requirements while preserving the precision needed for demodulation and charge carrier control.
3Productivity
If transfer region is always open, then charge carrier collection efficiency is improved, but unwanted charge collection increases
Solution Approach 1:
The transfer region impedance is made dynamically controllable through voltage applied to the modulation gate. Rather than being fixed in an always-open state, the transfer region impedance can be switched between low impedance (open) and high impedance (closed) states. This dynamic control allows the system to open the transfer region only when charge carrier collection is desired, and close it to prevent unwanted charge collection, thereby improving both collection efficiency and reducing harmful effects.
Solution Approach 2:
The electrical parameter of transfer region impedance is changed based on operational requirements. By adjusting the voltage level at the modulation gate, the impedance of the transfer region is modulated between different states. This parameter change enables precise control over charge carrier flow, allowing the system to optimize collection efficiency by opening the transfer region during integration and prevent unwanted collection by closing it during readout or discard operations.
4Speed
If transfer region impedance is reduced, then charge carrier transfer speed is improved, but space requirements increase
Solution Approach 1:
The patent replaces physical expansion of the transfer region structure with electrical control of impedance to achieve fast charge carrier transfer. Instead of increasing the physical size or adding complex mechanical transfer structures, the system uses voltage-controlled impedance modulation of the existing transfer region. This electrical approach achieves rapid charge carrier transfer speeds without increasing the pixel area, as the same physical region can be electrically optimized for different operating conditions.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design allows for efficient demodulation and discharge of charge carriers with minimal space, enabling fast switching and pulse skipping, while preventing unwanted charge collection, thus enhancing demodulation contrast and supporting correlated double sampling with global electronic shutter functionality.
Implementation Method 1
demodulation and discharge of desired photogenerated charge carriers into the charge storage and the selective discharge of unwanted photogenerated charge carriers
Implementation Method 2
By use of special implants below the photogates GA and GB in the transition from the mixing region to the storage region, a controllable resistor (transfer region TA/TB) is implemented. This controllable resistor can be considered as an integrated transistor, by means of which the access to the storage region can be actively controlled into an open or locked state.
Data Source
AI summary
A light time-of-flight pixel comprising at least one modulation gate (GA, GB) having a mixing and a transfer region (TA, TB), and comprising at least one storage region (SGA, SGB), the transfer region (TA, TB) being arranged between the mixing region and the storage region (SGA, SGB), the transfer region being doped in such a way that a modulation gate voltage present at the modulation gate (GA, GB) opens or closes charge transfer to the storage region (SGA, SGB).