TOF System Ripple Mitigation via PWM Synchronization
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Solution Overview
Problem
Time of flight (TOF) systems are susceptible to ripple in power supply, leading to inaccuracies in depth estimation and increased noise levels due to variations in light pulse generation, which existing solutions like increasing DC/DC converter size or switching frequency fail to adequately address without increasing cost and inefficiency.
Innovation Solution
A circuit with a controller generating a PWM clock signal for a DC/DC converter, ensuring a constant time integral of the output signal during integration time across multiple quad periods, mitigating ripple effects by synchronizing quad time periods with PWM clock periods or feedback ripple periods.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the size of passive devices in DC/DC converters is increased to reduce ripple, then the ripple in power supply is reduced, but the cost and size of the TOF system increase
Solution Approach 1:
The patent changes the timing parameters of the TOF system by making the integration time an integer multiple of the PWM period. This parameter adjustment causes the ripple effects to cancel out over complete PWM cycles, achieving ripple mitigation without modifying the physical size of passive components in the DC/DC converter.
Solution Approach 2:
The patent utilizes the periodic nature of PWM switching by synchronizing the integration time with integer multiples of the PWM period. This periodic alignment ensures that ripple effects accumulated during one PWM cycle are canceled by opposite ripple effects in subsequent cycles, eliminating the need for larger passive filtering components.
2Object-affected harmful factors
If the switching frequency of DC/DC converters is increased to reduce ripple, then the ripple in power supply is reduced, but the losses in DC/DC converters increase and efficiency decreases
Solution Approach 1:
Instead of changing the switching frequency parameter, the patent changes the integration time parameter to be an integer multiple of the PWM period. This approach mitigates ripple effects through temporal synchronization rather than frequency modification, avoiding the increased losses that would result from higher switching frequencies.
Solution Approach 2:
The patent replaces the traditional approach of using physical filtering components (mechanical/electrical solution) with a timing-based synchronization method (control system solution). This substitution achieves ripple mitigation through software/control logic rather than hardware modifications, maintaining energy efficiency.
3Reliability
If feedback based control system is used to regulate power supply output, then the output is regulated, but feedback ripple is introduced in the output
Solution Approach 1:
The patent converts the harmful feedback ripple into a beneficial effect by synchronizing the integration time with the PWM period. The feedback ripple, which occurs at the PWM frequency, is transformed into a periodic disturbance that cancels itself out when integrated over complete PWM cycles, turning a harmful artifact into an acceptable or even useful characteristic.
Solution Approach 2:
The patent applies periodic integration timing that aligns with the feedback ripple frequency. By making the integration time an integer multiple of the PWM period, the system exploits the periodic nature of feedback ripple to achieve cancellation effects, maintaining output regulation while eliminating harmful ripple components.
4Illumination intensity
If light pulses are generated with varying envelope due to power supply ripple, then the light source responds to power variations, but depth estimation accuracy decreases and noise level increases
Solution Approach 1:
The patent changes the integration time parameter to be an integer multiple of the PWM period, which causes the varying light envelope to integrate to a constant value. This parameter adjustment ensures that depth estimation measurements are taken over complete PWM cycles where ripple effects cancel out, maintaining measurement precision despite light intensity variations.
Solution Approach 2:
The patent performs preliminary synchronization of the integration timing with the PWM cycle before depth estimation occurs. By pre-aligning the integration windows with complete PWM periods, the system ensures that ripple effects are canceled before they can affect the depth measurement, preventing noise and accuracy degradation.
Data Source
AI summary
The disclosure provides a circuit to mitigate ripple. The circuit includes a controller that generates a PWM (pulse width modulated) clock signal. A DC/DC converter receives the PWM clock signal, and generates an output signal. A light source is coupled to the DC/DC converter, and receives the output signal. The light source transmits light pulses during an integration time. A time integral of the output signal during the integration time is constant during a plurality of quad time periods.