Toggle MRAM Dual Array Controller for High-Speed Burst Write
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing toggle MRAM technology faces challenges in executing continuous burst write operations at high speed without increasing circuit area or compromising reliability, due to the need for simultaneous sensing and writing operations which lead to unstable magnetization states and erroneous data storage.
Innovation Solution
The implementation of a toggle MRAM with two separate memory arrays and a controller that alternates between first and second burst write operations, allowing for synchronous sensing and writing with distinct address signals and write enable signals, ensuring accurate data storage without simultaneous sensing and writing.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If simultaneous sensing and writing operations are performed in the same memory array, then operation speed is improved, but magnetization stability deteriorates causing erroneous data storage
Solution Approach 1:
The memory array is divided into two separate memory arrays, allowing sensing operations in one array and writing operations in the other array to be performed simultaneously without interfering with each other's magnetization stability
Solution Approach 2:
The controller acts as an intermediary that coordinates and alternates between sensing and writing operations across the two memory arrays, ensuring that sensing and writing never occur simultaneously in the same array, thus maintaining magnetization stability while enabling parallel processing
2Reliability
If two separate memory arrays are implemented, then reliability of write operation is improved, but device complexity increases
Solution Approach 1:
Both memory arrays share common control logic and address decoding circuits, allowing the same hardware resources to serve multiple functions (sensing and writing) across different arrays, thereby reducing the overall complexity increase from having two arrays
3Productivity
If continuous burst write operations are executed, then productivity is improved, but magnetization stability deteriorates due to simultaneous sensing and writing
Solution Approach 1:
The continuous burst write operation is segmented into alternating sensing and writing phases across two memory arrays, allowing the system to maintain high throughput while ensuring that each individual operation completes fully before the next begins in the same array
Solution Approach 2:
The controller implements periodic alternation between sensing operations in one array and writing operations in the other array, creating a rhythmic pattern of operations that maintains both high productivity and magnetization stability through regular, predictable switching
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables high-speed continuous burst write operations without reliability drops and circuit area increases, by ensuring stable magnetization states and accurate data storage through separate sensing and writing operations in distinct memory arrays.
Implementation Method 1
a magnetoresistive element (127), in which a pinned layer (1271) and a free layer (1272) are laminated through a nonmagnetic metal layer (1273)
Implementation Method 2
a write current IWL is supplied to the write word line 123 at a time t1, and a write current IBL is supplied to the write bit line 121 at a time t2
Implementation Method 3
each of the first and second free layer magnetizations of the MTJ is rotated (the toggle operation is carried out) in a spin flop state
Data Source
AI summary
A toggle magnetic random access memory includes a first memory array, a second memory array and a controller. The first memory array includes a plurality of first memory cells including magnetoresistive elements. The second memory array includes a plurality of second memory cells including magnetoresistive elements and differs from the first memory array in write wirings used for writing. The controller controls the first memory array and the second memory array such that a first state in which a first burst write operation in the first memory array is executed and a second state in which a second burst write operation in the second memory array is executed are alternately executed in a continuous burst write mode. Accordingly, the continuous burst write operation can be executed at the high speed without any drop in the reliability and any increase in the circuit area.