Token-Based Cache Mirroring for Active-Active Storage Processors

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Solution Overview

Problem

Conventional data storage arrays with mirrored caching storage processors typically operate in an active/passive configuration, which limits their ability to achieve path indifference without exchanging a large number of messages, making it desirable to configure them in an active/active configuration with minimal message exchange.

Innovation Solution

The configuration of mirrored caching storage processors in an active/active mode using tokens associated with reference structures, where write and read operations are performed only after ensuring synchronization or requesting tokens over a cache mirroring bus to manage cache writes and reads efficiently.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If cache mirroring is enabled between two storage processors to increase reliability, then data reliability is improved, but the system operates in active/passive configuration which limits path indifference capability

Engineering Contradiction:
Improvedata reliabilityVSAvoidpath indifference capability
Core Design Contradiction:
ReliabilityVSAdaptability or versatility

Solution Approach 1:

The system dynamically switches between active/passive and active/active configurations based on operational needs. The storage processors can transition roles and share cache ownership dynamically, allowing the system to adapt between reliability-focused (active/passive) and performance-focused (active/active) modes without hardware changes.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The invention changes the operational parameter of cache mirroring from static (traditional active/passive) to dynamic (active/active with token-based coordination). By introducing token counts and synchronization states as controllable parameters, the system can adjust its behavior to enable path indifference while maintaining reliability.

Inventive Principle:
Principle #35Parameter changes

2Adaptability or versatility

If storage processors are configured in active/active fashion to allow path indifference, then adaptability is improved, but a large number of messages must be exchanged between storage processors

Engineering Contradiction:
Improvepath indifferenceVSAvoidmessage exchange volume
Core Design Contradiction:
Adaptability or versatilityVSDevice complexity

Solution Approach 1:

The invention extracts the essential coordination information (synchronization state and token count) from complex message exchanges and encodes it into compact token structures within cache reference blocks. This reduces the communication overhead by only exchanging necessary token information rather than full synchronization states.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

Tokens serve as intermediaries that mediate between storage processors for cache coordination. Instead of direct complex message exchanges, processors use token-based signaling where tokens encode synchronization state and permission information, simplifying the interaction protocol.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Device complexity

If tokens are used to manage cache operations in active/active configuration, then message exchange is minimized, but token synchronization between storage processors is required

Engineering Contradiction:
Improvemessage exchange volumeVSAvoidcache operation efficiency
Core Design Contradiction:
Device complexityVSProductivity

Solution Approach 1:

The system performs preliminary synchronization by establishing token ownership and counts before cache operations begin. Tokens are pre-configured with synchronization states and permission bits that allow storage processors to independently determine whether they can proceed with cache reads or writes without real-time coordination, improving operational efficiency.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

Storage processors use the token information stored in cache reference blocks to self-determine their ability to perform cache operations. The synchronization state and token count fields allow processors to autonomously make decisions about cache access without continuous external coordination, reducing productivity overhead.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS9003129B1Techniques for inter-storage-processor cache communication using tokens
Publication Date: 2015.04.07 EMC IP HLDG CO LLC
  • US9003129B1 patent drawing
  • US9003129B1 patent drawing
  • US9003129B1 patent drawing

AI summary

A method, performed at a first storage processor (SP) connected to a mirroring second SP, includes (a) receiving a write command at the first SP from a host directed to a particular address of a data storage array, (b) identifying a reference in a first cache that is uniquely associated with the particular address, the reference having a token count field, (c) determining whether the reference is synchronized with a corresponding reference in a second cache, and (d) if the reference is synchronized with the corresponding reference, then (1) performing a cache write operation on a cache page pointed to by the reference if the reference stores a maximum token count value and (2) otherwise, sending a token request message from the first SP to the second SP over a cache mirroring bus to request a token from the second SP prior to performing the cache write operation.