Tone Generation Hardware Error Correction

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Solution Overview

Problem

Tone generation apparatus using NAND-type flash memory faces challenges with increased CPU burden and data errors, as well as limitations in simultaneous tone reproduction due to the need for CPU intervention and lack of dedicated hardware for error correction.

Innovation Solution

A tone generation apparatus with a control section that performs error detection and correction using hardware within the tone generation section, reducing CPU load and enabling simultaneous multi-channel tone generation by using a dedicated hardware circuit for controlling tone generation and error handling.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Speed

If NAND-type flash memory is used to store waveform data, then data transfer speed is improved, but CPU burden increases due to increased transfer request interrupt frequency

Engineering Contradiction:

Improvedata transfer speedVSAvoidCPU burden

Core Design Contradiction:

SpeedVSDevice complexity

Solution Approach 1:

A dedicated hardware circuit is introduced as an intermediary between the NAND-type flash memory and the CPU. This circuit handles transfer request interrupts and error correction operations, preventing them from directly burdening the CPU while maintaining high data transfer speeds from the flash memory

Inventive Principle:

Principle #24Intermediary (Mediator)

2Speed

If NAND-type flash memory is used to store waveform data, then data transfer speed is improved, but data errors increase requiring error correction

Engineering Contradiction:

Improvedata transfer speedVSAvoiddata error rate

Core Design Contradiction:

SpeedVSReliability

Solution Approach 1:

The dedicated hardware circuit performs error correction automatically and autonomously without CPU intervention. When data errors occur in the NAND-type flash memory, the circuit detects and corrects them through hardware-based error correction logic, ensuring data reliability while maintaining high transfer speeds

Inventive Principle:

Principle #25Self-service

3Measurement precision

If CPU controls tone generation with increased interrupt frequency, then data transfer accuracy is improved, but productivity decreases due to limited simultaneous channels

Engineering Contradiction:

Improvedata transfer accuracyVSAvoidnumber of simultaneous channels

Core Design Contradiction:

Measurement precisionVSProductivity

Solution Approach 1:

The CPU-based control system is replaced with a dedicated hardware circuit that uses hardware-level interrupt handling and error correction mechanisms. This substitution maintains precise data transfer control while enabling multiple simultaneous tone generation channels by parallelizing the control operations in hardware

Inventive Principle:

Principle #28Mechanics substitution (Replace mechanical system)

Data Source

PatentUS8183452B2Tone generation apparatus

Publication Date: 2012.05.22 YAMAHA CORP

AI summary

Waveform data stored in an external memory are transferred from the external memory to an internal waveform memory and read out from the waveform memory to reproduce a tone. Transfer instruction is generated each time data readout from the waveform memory progresses by one page, and the transfer instruction is registered into a transfer queue. Thus, in response to the transfer instruction from the queue, the waveform data are read out on page by page from the external memory and stored into the waveform memory. The external memory also stores therein error correction code attached per page. As the waveform data are transferred from the external memory to the waveform memory, an error is detected using the error correction code, and if the error is correctable, the error is corrected. If the error is uncorrectable, volume of a tone being generated is rapidly attenuated, or a warning is issued.