Semiconductor Tool Shutdown Verification to Prevent Wrong Apparatus Stops

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Solution Overview

Problem

The challenge in semiconductor manufacturing factories is the frequent mistaken shutdown of semiconductor manufacturing apparatuses due to their large numbers and similar models, leading to schedule revisions and substrate shipment delays.

Innovation Solution

Implementing a method that requires input of pre-registered apparatus names, using operation receiving units on multiple surfaces, and reserving shutdowns through an apparatus group management system to ensure accurate identification and execution of shutdowns.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If shutdown operation is performed on semiconductor manufacturing apparatus, then maintenance or replacement can be executed, but mistaken shutdown of wrong apparatus occurs frequently

Engineering Contradiction:
Improveshutdown operation accuracyVSAvoidshutdown operation complexity
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The system performs preliminary identification verification by comparing the input identification information with the registered identification information of the target apparatus before executing the shutdown operation. This preliminary check ensures that the correct apparatus is selected and prevents mistaken shutdown of wrong apparatus.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system provides feedback by displaying the identified apparatus information to the operator and confirming whether it matches the intended target. This feedback mechanism allows the operator to verify the correct apparatus is selected before proceeding with shutdown, thereby improving shutdown operation accuracy.

Inventive Principle:
Principle #23Feedback

2Reliability

If identification verification is performed before shutdown, then mistaken shutdown is prevented, but operation time increases

Engineering Contradiction:
Improveapparatus identification accuracyVSAvoidshutdown preparation time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

The system performs preliminary registration of identification information for each semiconductor manufacturing apparatus in advance. During shutdown operation, the system only needs to retrieve and compare the registered information with the input information, rather than performing complex identification from scratch, thus reducing the time penalty of verification.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The system uses a simplified copy-comparison approach where the input identification information is directly compared with the registered identification information string. This simple copying and comparison method is computationally efficient and minimizes verification time while ensuring accurate identification.

Inventive Principle:
Principle #26Copying

3Reliability

If multiple operation receiving units are disposed at different locations, then mistaken operation is suppressed, but device complexity increases

Engineering Contradiction:
Improveoperation execution accuracyVSAvoidoperation receiving system complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The operation receiving system is segmented into multiple geographically separated operation receiving units distributed at different locations within the factory. Each unit can independently receive shutdown instructions, and the system processes them separately with identification verification, reducing the risk of mistaken operation while maintaining manageable system complexity through modular design.

Inventive Principle:
Principle #1Segmentation

Data Source

PatentUS12438021B2Semiconductor manufacturing apparatus and processing method of semiconductor manufacturing apparatus
Publication Date: 2025.10.07 TOKYO ELECTRON LTD
  • US12438021B2 patent drawing
  • US12438021B2 patent drawing
  • US12438021B2 patent drawing

AI summary

A semiconductor manufacturing apparatus includes: an execution instruction receiving unit that receives an execution instruction for the semiconductor manufacturing apparatus to execute a predetermined process related to an operation control of the semiconductor manufacturing apparatus; an identification information receiving unit that receives an input of identification information of the semiconductor manufacturing apparatus; and an execution unit that executes the predetermined process according to the execution instruction of the predetermined process when identification information of the semiconductor manufacturing apparatus preset in the semiconductor manufacturing apparatus is the same as the identification information of the semiconductor manufacturing apparatus received by the identification information receiving unit.