Top-Gate Array Substrate via Direct Drain-Pixel Connection
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Solution Overview
Problem
Conventional bottom-gate TFT array substrates face issues such as via abnormalities and reduced aperture ratio due to contaminant particles and complex manufacturing processes, particularly in COA displays where the color filter layer is between the TFT device and pixel electrode, leading to bubble formation and alignment difficulties.
Innovation Solution
A manufacturing method for a top-gate TFT array substrate that forms a black matrix on a backing plate, followed by depositing and patterning layers to create source and drain electrodes, a pixel electrode, and a color filter layer, eliminating the need for vias in insulation layers and simplifying the process with fewer masks, thereby enhancing electrical performance and stability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If a via is formed in the passivation layer to connect the drain electrode to the pixel electrode, then electrical connection is achieved, but via abnormalities and contaminant particles cause reduced product yield
Solution Approach 1:
The invention extracts and eliminates the via formation step from the manufacturing process. By designing the pixel electrode to directly contact the drain electrode through the opening in the color filter layer, the complex via formation process in the passivation layer is completely removed, thereby eliminating via abnormalities and contaminant particle issues that reduce product yield
Solution Approach 2:
Instead of forming connections through vias in the passivation layer (conventional approach), the invention inverts the connection approach by making the pixel electrode directly contact the drain electrode through the color filter layer opening, reversing the traditional connection path and eliminating the problematic via formation step
2Ease of manufacture
If the color filter layer is arranged between the TFT device and pixel electrode, then COA display structure is achieved, but alignment difficulties and bubble formation occur
Solution Approach 1:
The invention extracts the pixel electrode connection from beneath the color filter layer and repositions it to directly contact the drain electrode through the color filter layer opening. This eliminates the need for precise alignment between the pixel electrode and underlying structures, removing alignment difficulties while maintaining COA display structure
Solution Approach 2:
The color filter layer opening is formed beforehand to enable direct contact between the pixel electrode and drain electrode. This preliminary action of creating the opening eliminates subsequent alignment requirements and prevents bubble formation by establishing a clear, defined connection path
3Manufacturing precision
If the black matrix is widened to compensate for position shift in laminating, then alignment tolerance is improved, but aperture ratio is reduced
Solution Approach 1:
The invention extracts the alignment compensation function from the black matrix and transfers it to the color filter layer opening. By forming the opening in the color filter layer to directly expose the drain electrode, the black matrix can maintain its original dimensions without widening, thereby preserving aperture ratio while achieving alignment tolerance through the opening design
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This method improves the electrical performance and stability of TFT devices, reduces manufacturing costs, and minimizes bubble formation by directly connecting the pixel electrode to the drain electrode, while the black matrix acts as a light shielding layer and the color filter layer provides surface planarization, enhancing display panel quality.
Implementation Method 1
the gate electrode 200 of the bottom-gate TFT can function as a light shielding layer to shield light from a backlight module from irradiating the active layer 400 so as to prevent a photo current from generating
Implementation Method 2
depositing a first metal layer (M1) on the glass substrate 100
Implementation Method 3
forming a gate insulation layer 300 on the gate electrode 200 and the glass substrate 100 through deposition
Implementation Method 4
subjecting the first metal layer to patterning to form a gate electrode 200
Data Source
AI summary
The present invention provides a manufacturing method of an array substrate and an array substrate. The manufacturing method of the array substrate according to the present invention combines the COA technology and the BOA technology, where a black matrix is first formed on a backing plate, followed by forming a top-gate TFT device on the black matrix, and finally forming a color filter layer on the TFT device, wherein the pixel electrode is directly arranged on the drain electrode and connected with the drain electrode. The manufacturing method helps enhance electrical performance of a TFT device and stability of performance, improves quality of a display panel, and, compared to an existing array substrate manufacturing method, reduces masks and operations involved. The manufacturing method is simple and helps reduce manufacturing costs. The array substrate of the present invention requires a simple manufacturing method, provides enhanced electrical performance of a TFT device and stability of performance, and improves quality of a display panel.