Top-Gate TFT Active Matrix Substrate for Low-Flicker Displays
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Solution Overview
Problem
The configuration of oxide semiconductor TFTs with a bottom-gate structure in active matrix substrates results in reduced current driving ability due to thick gate insulating layers and large gate-drain capacitance, leading to increased kickback voltage and flicker distribution, which degrades display quality, while using polycrystalline silicon TFTs in peripheral circuits poses reliability concerns with high voltage breakdown resistance.
Innovation Solution
An active matrix substrate with both oxide semiconductor TFTs and crystalline silicon TFTs, where both types have a top-gate structure, reducing the thickness of the gate insulating layer and minimizing gate-drain capacitance, thereby enhancing current driving ability and maintaining reliability.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If oxide semiconductor TFTs with bottom-gate structure are used, then the manufacturing process is simpler and can be employed for large area devices, but the gate insulating layer thickness increases and current driving ability is reduced
Solution Approach 1:
The patent inverts the conventional bottom-gate structure to a top-gate structure for oxide semiconductor TFTs. This inversion allows the gate electrode to be positioned above the oxide semiconductor layer, enabling thinner gate insulating layers and improving current driving ability while maintaining the simplicity of oxide semiconductor fabrication processes
2Reliability
If oxide semiconductor TFTs with bottom-gate structure are used, then the gate insulating layer must be thick to ensure voltage breakdown resistance, but this reduces current driving ability
Solution Approach 1:
By inverting to a top-gate structure, the gate electrode is positioned above the oxide semiconductor layer, allowing the gate insulating layer to be thinner while still providing adequate voltage breakdown resistance. The top-gate configuration improves the electric field distribution and reduces the required insulating layer thickness compared to bottom-gate structures
3Speed
If oxide semiconductor TFTs are used, then the mobility is higher than amorphous silicon, but the mobility is still one order of magnitude lower than polycrystalline silicon, resulting in insufficient current driving ability
Solution Approach 1:
The patent changes the structural parameters of oxide semiconductor TFTs by adopting a top-gate configuration, which modifies the electric field distribution and improves carrier mobility. This parameter change enables oxide semiconductor TFTs to achieve current driving ability comparable to polycrystalline silicon TFTs while maintaining the manufacturing advantages of oxide semiconductors
4Power
If the TFT size is increased to compensate for low current driving ability, then the current driving ability improves, but the peripheral region becomes narrower
Solution Approach 1:
By changing the gate structure parameter from bottom-gate to top-gate, the patent improves current driving ability without increasing TFT dimensions. This parameter change allows the peripheral region to maintain its area while achieving sufficient current driving ability for driving circuits
5Ease of manufacture
If oxide semiconductor TFTs are used in driving circuits, then the manufacturing process is simplified, but the kickback voltage increases and display quality degrades
Solution Approach 1:
The patent inverts to a top-gate structure for oxide semiconductor TFTs in driving circuits, which reduces the gate-drain capacitance and minimizes kickback voltage. This inversion maintains the manufacturing simplicity of oxide semiconductor processes while eliminating the harmful kickback voltage effect that degrades display quality
Data Source
AI summary
According to an embodiment of the present invention, an active matrix substrate (100) includes a display region (DR) defined by a plurality of pixel regions (P) arranged in a matrix and a peripheral region (FR) located around the display region. The active matrix substrate includes a substrate (1), a first TFT (10), and a second TFT (20). The first TFT is supported by the substrate and disposed in the peripheral region. The second TFT is supported by the substrate and disposed in the display region. The first TFT includes a crystalline silicon semiconductor layer (11), which is an active layer. The second TFT includes an oxide semiconductor layer (21), which is an active layer. The first TFT and the second TFT each have a top-gate structure.


