TOPCon Solar Cell Rear Texture for Low Contact Resistivity
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
The existing manufacturing process of N-type tunnel oxide passivated contact (TOPCon) solar cells faces challenges in removing borosilicate glass, leading to increased contact resistivity and fluctuations in fill factor, which affects the photoelectric conversion efficiency due to the difficulty in polishing the rear surface of the solar cell.
Innovation Solution
A solar cell design with a first texture structure on the rear surface and a pyramid-shaped microstructure on the front surface, along with specific passivation layers, is implemented to improve the open-circuit voltage and reduce contact resistance, involving a method that includes alkali polishing and chemical vapor deposition to form a tunnel oxide layer and doped conductive layer.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of manufacture
If borosilicate glass is removed by oxidizing mixed acid solution and polishing is performed, then the rear surface can be cleaned, but the polishing process directly affects the manufacturing of tunnel oxide layer and polycrystalline silicon layer, leading to increased contact resistivity and fluctuations in fill factor
Solution Approach 1:
The patent applies preliminary action by performing a specific polishing treatment on the rear surface before forming the tunnel oxide layer. The polishing process uses controlled parameters (polishing time of 1-5 seconds, polishing liquid flow rate of 1-5 mL/min) to prepare the surface in advance, ensuring that subsequent tunnel oxide layer formation is not adversely affected. This preliminary surface preparation eliminates the need for extensive polishing that would otherwise compromise tunnel oxide layer uniformity.
2Ease of manufacture
If the rear surface is polished extensively to remove borosilicate glass, then cleaning is improved, but contact resistivity increases and fill factor fluctuates
Solution Approach 1:
The patent applies parameter changes by precisely controlling the polishing process parameters to achieve the desired cleaning effect while avoiding excessive polishing. The polishing time is limited to 1-5 seconds, polishing liquid flow rate is controlled at 1-5 mL/min, and polishing power is maintained at 20-100 W. These parameter optimizations ensure thorough removal of borosilicate glass without creating surface conditions that would increase contact resistivity or cause fill factor fluctuations.
3Device complexity
If the distance between top surfaces of stacked first substructures is increased, then manufacturing complexity is reduced, but open-circuit voltage decreases
Solution Approach 1:
The patent applies parameter changes by optimizing the distance between top surfaces of stacked first substructures to fall within the range of 0.1-2 μm. This parameter optimization achieves a balance between manufacturing complexity and electrical performance. The controlled spacing ensures sufficient light trapping and carrier collection to maintain high open-circuit voltage, while the standardized dimensional parameters facilitate manufacturing processes.
4Use of energy by moving object
If the one-dimensional size of top surface of outermost first substructure is increased, then light absorption is improved, but contact resistance of metal electrode increases
Solution Approach 1:
The patent applies parameter changes by controlling the one-dimensional size of the top surface of the outermost first substructure to be within 1-45 μm. This size optimization achieves effective light absorption for photoelectric conversion while maintaining low contact resistance for the metal electrode. The dimensional parameters are tuned to balance optical performance and electrical contact properties.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enhances the uniformity of the tunnel oxide layer, reduces contact resistivity, and improves the photoelectric conversion efficiency by controlling the distance and size of the texture structures, resulting in better performance and stability of the solar cell.
Implementation Method 1
involving a method that includes alkali polishing and chemical vapor deposition to form a tunnel oxide layer
Implementation Method 2
a doped conductive layer located on a surface of the tunnel oxide layer, a conductivity type of doping elements of the doped conductive layer being same as that of the semiconductor substrate
Data Source
AI summary
Provided are a solar cell, a manufacturing method thereof, and a photovoltaic module. The solar cell includes: a semiconductor substrate, in which a rear surface of the semiconductor substrate having a first texture structure, the first texture structure includes two or more first substructures at least partially stacked on one another, and in a direction away from the rear surface and perpendicular to the rear surface, a distance between a top surface of an outermost first substructure and a top surface of an adjacent first substructure being less than or equal to 2 μm; a first passivation layer located on a front surface of the semiconductor substrate; a tunnel oxide layer located on the first texture structure; a doped conductive layer located on a surface of the tunnel oxide layer; and a second passivation layer located on a surface of the doped conductive layer.