TOPCon Solar Cell Barrier Layers for Passivation and Light Absorption

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Solution Overview

Problem

The existing TOPCon cells face issues with parasitic light absorption and reduced passivation effects due to thick polycrystalline silicon layers and high-temperature sintering processes, leading to decreased photoelectric conversion efficiency.

Innovation Solution

A solar cell design incorporating a hydrogen barrier layer and metal barrier layer within a grid-shaped doped conductive structure, which prevents hydrogen overflow and electrode erosion, respectively, enhancing passivation and reducing the thickness of the polycrystalline silicon layer.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the polycrystalline silicon layer is thickened to improve passivation loss caused by metallization process, then passivation effect is improved, but parasitic light absorption increases

Engineering Contradiction:
Improvepassivation effectVSAvoidparasitic light absorption
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent applies local quality by creating a non-uniform doping concentration distribution within the polycrystalline silicon layer. The doping concentration is higher near the tunnel oxide interface (improving passivation) and gradually decreases toward the rear surface (reducing parasitic light absorption). This gradient doping profile allows different regions of the same layer to serve different functions optimally.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent changes the doping concentration parameter from uniform to graded distribution. By controlling the doping concentration to decrease from the tunnel oxide interface toward the rear surface, the patent simultaneously achieves good passivation effect at the interface and reduced parasitic absorption in the bulk, resolving the contradiction between these two requirements.

Inventive Principle:
Principle #35Parameter changes

2Ease of manufacture

If high-temperature sintering is used in screen printing metallization process, then metallization is achieved, but quality of passivation of phosphorus-doped polycrystalline silicon structure deteriorates

Engineering Contradiction:
Improvemetallization processVSAvoidpassivation quality
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent applies preliminary action by pre-forming the phosphorus-doped polycrystalline silicon structure with optimized doping concentration distribution before the high-temperature sintering process. The doping profile is established in advance to withstand the thermal stress of sintering, ensuring passivation quality is maintained even after exposure to high temperatures during metallization.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The patent applies preliminary anti-action by designing a doping concentration gradient that anticipates and counteracts the damaging effects of high-temperature sintering. The higher doping concentration near the interface provides a buffer against thermal degradation, preventing passivation quality deterioration during the metallization process.

Inventive Principle:
Principle #9Preliminary anti-action

3Reliability

If silver in finger is used for ohmic contact effect, then electrical contact is achieved, but polycrystalline silicon is eroded to depth of about 30 nm

Engineering Contradiction:
Improveohmic contact effectVSAvoidpolycrystalline silicon erosion
Core Design Contradiction:
ReliabilityVSLoss of substance

Solution Approach 1:

The patent applies local quality by concentrating the doping in a localized region near the tunnel oxide interface, creating a highly conductive contact region exactly where the metal finger makes contact. This localized high-doping region provides excellent ohmic contact while minimizing the overall amount of polycrystalline silicon that needs to be present, thereby reducing erosion damage.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent applies preliminary action by pre-forming the heavily doped polycrystalline silicon layer before the metallization process. This pre-formed conductive layer serves as a buffer that protects the underlying semiconductor substrate from direct contact and erosion by the metal fingers, while still providing the necessary ohmic contact effect.

Inventive Principle:
Principle #10Preliminary action

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

The proposed design improves fill factor efficiency and solar energy conversion efficiency by maintaining hydrogen concentration at the tunneling layer interface and reducing parasitic light absorption, outperforming conventional TOPCon cells.

Implementation Method 1

The ultra-thin oxide layer may cause electrons to tunnel into the polycrystalline silicon layer and block transport of holes

Methodology Applied
Scientific EffectTunneling effect:

Implementation Method 2

a hydrogen barrier layer located over a surface of the tunneling layer

Methodology Applied
Scientific EffectDiffusion barrier: Diffusion Barrier

Implementation Method 3

a metal barrier layer that are stacked on one another

Methodology Applied
Scientific EffectThermal erosion resistance:

Implementation Method 4

improves photoelectric conversion efficiency of the solar cell

Methodology Applied
Scientific EffectPhotoelectric effect: Photoelectric Effect

Data Source

PatentUS12364053B2Solar cell and method for manufacturing solar cell, and photovoltaic module
Publication Date: 2025.07.15 ZHEJIANG JINKO SOLAR CO LTD
  • US12364053B2 patent drawing
  • US12364053B2 patent drawing
  • US12364053B2 patent drawing

AI summary

A solar cell, a method for manufacturing solar cell, and a photovoltaic module. The solar cell includes: a semiconductor substrate; a tunneling layer located over a rear surface of the semiconductor substrate; a hydrogen barrier layer located over a surface of the tunneling layer; a lightly doped conductive layer located over a surface of the hydrogen barrier layer; and grid-shaped doped conductive layers located on at least part of a surface of the lightly doped conductive layer, wherein each of the grid-shaped doped conductive layers includes a heavily doped conductive layer and a metal barrier layer that are stacked on one another.