Topographic Package Hybrid Bonding With Dummy Dies and Through Vias

The patent extracts and eliminates the complex intermediate processing steps (multiple dielectric layer depositions and chemical-mechanical polishing) from the conventional fabrication process. By using direct hybrid bonding between complementary metal-oxide-semiconductor (CMOS) devices, the method removes unnecessary intermediary layers and steps while maintaining bonding surface precision through direct surface preparation and bonding.

The patent introduces a self-aligned bonding approach where the bonding interface itself acts as the mediator between two CMOS devices. By using direct hybrid bonding with properly prepared bonding surfaces, the method eliminates the need for intermediate dielectric layers and complex polishing steps, achieving precise alignment and bonding through the inherent structure of the devices.

The patent extracts and eliminates the time-consuming deep dielectric cavity etching and metal filling steps from the conventional process. By using direct hybrid bonding, the method achieves reliable electrical connections through direct bonding of bonding pads and interconnect structures without requiring deep cavity formation and filling operations.

The patent applies preliminary action by pre-forming the bonding surfaces and interconnect structures on both CMOS devices before bonding. The bonding pads and interconnect layers are prepared in advance with proper alignment features, so that when the devices are bonded directly, reliable electrical connections are immediately established without requiring subsequent cavity etching or metal filling operations.

The patent applies self-service by designing the CMOS device structures to be self-preparing for direct hybrid bonding. The standard CMOS fabrication process inherently creates bonding surfaces with appropriate properties, and the self-aligned bonding approach uses the device structures themselves to guide and enable precise bonding without requiring additional specialized surface preparation equipment or processes.

The patent makes the standard CMOS fabrication process universal for direct hybrid bonding applications. By demonstrating that conventional CMOS manufacturing can produce devices with bonding surfaces suitable for direct hybrid bonding, the method eliminates the need for separate, specialized surface preparation processes, making the same fabrication line capable of producing both standard and bondable devices.