Topography Driven OPC for Lithography Pattern Transfer Integrity

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Conventional pattern enhancement techniques are inadequate for improving pattern transfer integrity, particularly in advanced nodes, leading to lithographic weak points that impact the integrity of the pattern transfer process during the fabrication of devices like integrated circuits.

Innovation Solution

A lithographic enhancement process that includes topography analysis, optical proximity correction (OPC), and process window qualification (PWQ) to adjust mask patterns based on defocus values and topography information, generating an adjusted design data file for improved mask sets and wafer processing.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Manufacturing precision

If conventional pattern enhancement techniques are used, then the manufacturing process is simple, but the pattern transfer integrity is poor

Engineering Contradiction:
Improvepattern transfer integrityVSAvoidlithographic enhancement process complexity
Core Design Contradiction:
Manufacturing precisionVSDevice complexity

Solution Approach 1:

The patent performs topography analysis and OPC adjustments before mask fabrication, predicting and correcting lithographic weak points in advance. This preliminary action ensures pattern transfer integrity is maintained without requiring complex real-time adjustments during manufacturing.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The lithographic enhancement process is segmented into distinct modules: topography analysis, defocus value determination, OPC adjustment, and verification. This segmentation allows each function to be performed independently and systematically, managing complexity while achieving high pattern transfer integrity.

Inventive Principle:
Principle #1Segmentation

2Reliability

If topography analysis and OPC are performed, then lithographic weak points are identified and addressed, but the processing time increases

Engineering Contradiction:
Improvepattern transfer integrityVSAvoidlithographic enhancement processing time
Core Design Contradiction:
ReliabilityVSLoss of time

Solution Approach 1:

Topography analysis and OPC adjustments are performed in advance during the design phase, identifying and correcting lithographic weak points before mask fabrication. This preliminary action prevents defects rather than requiring time-consuming rework during manufacturing, improving reliability without significant time penalty.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The process uses feedback from topography analysis to automatically adjust OPC parameters and patterns. This closed-loop approach efficiently identifies and corrects lithographic weak points without requiring multiple iterative cycles, reducing processing time while maintaining high pattern transfer integrity.

Inventive Principle:
Principle #23Feedback

3Adaptability or versatility

If advanced node fabrication is used, then device functionality is improved, but lithographic weak points increase

Engineering Contradiction:
Improvedevice functionalityVSAvoidpattern transfer integrity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent applies local quality by determining specific defocus values for different topography regions and adjusting OPC patterns locally based on regional topography characteristics. This localized approach addresses lithographic weak points specific to each region, maintaining pattern transfer integrity across the entire device structure at advanced nodes.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The process changes lithographic parameters (defocus values, OPC patterns) based on topography analysis results. By adjusting these parameters according to specific topography conditions, the method maintains pattern transfer integrity while enabling advanced node device functionality.

Inventive Principle:
Principle #35Parameter changes

Data Source

PatentUS9064084B2Topography driven OPC and lithography flow
Publication Date: 2015.06.23 GLOBALFOUNDRIES SINGAPORE PTE LTD
  • US9064084B2 patent drawing
  • US9064084B2 patent drawing
  • US9064084B2 patent drawing

AI summary

Enhancements in lithography for forming an integrated circuit are disclosed. The enhancements include a topography analysis of a design data file to obtain accumulative topography information for different mask levels. The topography information facilitates topography driven optical proximity correction and topography driven lithography.