Hardware Packet Replication in TOR Switches for NFV Load Reduction

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Solution Overview

Problem

Conventional packet replication methods, especially in network function virtualization (NFV) environments, face performance issues due to increased replication loads on software switches and wasted bandwidth, particularly with multi-destination traffic, as they require additional replication resources and multicast support across multiple domains, which is difficult to implement.

Innovation Solution

Hardware-based packet replication using application-specific integrated circuits (ASICs) in top-of-rack (TOR) switches, where packet header information indicates replication, allowing unicast packets to be forwarded to last-hop TOR switches for translation into multicast packets, reducing the load on software switches and optimizing network traffic.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If software-based packet replication is used in NFV environments, then network function virtualization flexibility is achieved, but replication loads on software switches increase and performance deteriorates

Engineering Contradiction:
Improvenetwork function virtualization flexibilityVSAvoidsoftware switch replication performance
Core Design Contradiction:
Adaptability or versatilityVSProductivity

Solution Approach 1:

The patent introduces hardware-based replication in TOR switches as an intermediary mechanism between the software-defined network controller and the virtual network functions. The TOR switch hardware performs packet replication using ASICs, acting as a mediator that offloads this function from software switches while maintaining the flexibility of NFV. This resolves the contradiction by enabling software-based control plane while using hardware for data plane replication.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent replaces software-based packet replication (mechanical/system software process) with hardware-based replication using ASICs in TOR switches. This substitution moves the replication function from the software domain to the hardware domain, improving performance while maintaining NFV flexibility through the controller's ability to program the hardware.

Inventive Principle:
Principle #28Mechanics substitution (Replace mechanical system)

2Adaptability or versatility

If ingress replication is used for multi-destination traffic, then multicast support is eliminated in the underlay network, but bandwidth is wasted and replication resources are consumed

Engineering Contradiction:
Improvemulticast support eliminationVSAvoidbandwidth waste
Core Design Contradiction:
Adaptability or versatilityVSLoss of energy

Solution Approach 1:

The patent applies local quality by performing replication only at the tail-end TOR switches where it is actually needed, rather than replicating packets at every hop or using network-wide multicast. Each TOR switch independently determines whether replication is needed based on local destination information, optimizing bandwidth usage while eliminating the need for underlay multicast support.

Inventive Principle:
Principle #3Local quality

3Productivity

If hardware-based packet replication is implemented in TOR switches, then replication loads on software switches are reduced, but device complexity increases

Engineering Contradiction:
Improvesoftware switch replication loadVSAvoidTOR switch hardware complexity
Core Design Contradiction:
ProductivityVSDevice complexity

Solution Approach 1:

The TOR switches are equipped with self-service capabilities through ASICs that automatically perform packet replication based on embedded forwarding rules. The hardware autonomously handles replication decisions and execution without requiring software switch intervention, reducing software switch loads while the complexity is contained within the TOR switch hardware itself.

Inventive Principle:
Principle #25Self-service

Data Source

PatentUS11218336B2Hardware based packet replication at tail end node
Publication Date: 2022.01.04 CISCO TECHNOLOGY INC
  • US11218336B2 patent drawing
  • US11218336B2 patent drawing
  • US11218336B2 patent drawing

AI summary

Aspects of the disclosed technology address limitations relating to packet replication for multi-destination traffic, by providing methods for performing hardware-based replication in network infrastructure devices, such as switches. In some aspects, application specific integrated circuits (ASICs) resident in physical devices can be used to perform packet replication. Depending on implementation, a hardware-based replication process can include steps for receiving a first packet that includes a first outer header containing first address information, receiving a second packet including a second outer header containing a hardware replication flag, forwarding the first packet to all virtual tunnel endpoints (VTEPs) connected with the TOR switch, and performing hardware replication for the second packet based on the hardware replication flag to generate one or more unicast packets. Systems and machine readable media are also provided.