Torn Write Mitigation Circuitry for Non-Volatile Cache Recovery

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Solution Overview

Problem

Data storage devices face issues with 'torn writes' or 'write-splices' due to unexpected power losses during write operations, resulting in unrecoverable or degraded data, especially when the power loss occurs before data validation can be completed, leading to errors and corruption across memory sectors.

Innovation Solution

Implementing a torn write mitigation system that detects power loss and stores torn write data and associated metadata in a non-volatile cache, allowing for later recovery and validation once power is restored, using power monitoring and backup circuitry to ensure timely data transfer to the cache.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If data is written directly to memory without validation completion, then write speed is improved, but data reliability deteriorates due to torn writes from power loss

Engineering Contradiction:
Improvewrite speedVSAvoiddata reliability
Core Design Contradiction:
ProductivityVSReliability

Solution Approach 1:

The patent implements a non-volatile cache that temporarily holds write data before it is committed to memory. This preliminary storage mechanism ensures that if power is lost during the write operation, the data can be recovered from the cache rather than being lost entirely. The cache acts as a buffer that preserves data integrity without significantly impacting write speed, as the data path remains open but with an additional safety layer.

Inventive Principle:
Principle #10Preliminary action

2Reliability

If power loss detection and data recovery mechanisms are implemented, then data reliability is improved, but device complexity increases

Engineering Contradiction:
Improvedata reliabilityVSAvoiddevice complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent introduces a non-volatile cache as an intermediary component between the write source and the final memory destination. This cache simplifies the overall system architecture by providing a single point for data recovery rather than requiring complex distributed recovery mechanisms across multiple memory components. The cache handles the complexity of power loss detection and data preservation, making the rest of the system simpler.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If all write data is validated before completion, then data reliability is improved, but write operation duration increases

Engineering Contradiction:
Improvedata reliabilityVSAvoidwrite operation duration
Core Design Contradiction:
ReliabilityVSDuration of action of moving object

Solution Approach 1:

The patent implements partial validation where the non-volatile cache provides basic data preservation without requiring full validation of all write operations before completion. The cache stores data in a sufficiently protected state that allows recovery without needing to verify every byte was perfectly written to final memory. This approach achieves adequate reliability without the performance penalty of exhaustive validation.

Inventive Principle:
Principle #16Partial or excessive action

Data Source

PatentUS9448896B2Torn write mitigation
Publication Date: 2016.09.20 SEAGATE TECH LLC
  • US9448896B2 patent drawing
  • US9448896B2 patent drawing
  • US9448896B2 patent drawing

AI summary

Torn write mitigation circuitry determines if a write operation to memory is in progress at or about a time of power loss. In response to the write operation being in progress at or about the time of the power loss, the torn write mitigation circuitry causes torn write data and metadata to be stored to a non-volatile cache. The torn write data comprise data left in a degraded or uncorrectable state as a result of the loss of power. The metadata describe the torn write data.