Totem Pole PFC Current Shaping for Thyristor Zero-Crossing

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Solution Overview

Problem

Conventional bidirectional totem pole PFC converters face issues during zero-crossing of the AC waveform, leading to unintended current flow through thyristors, which can cause damage and reduce efficiency and reliability due to the use of dead time, resulting in increased Total Harmonic Distortion (THD).

Innovation Solution

A control circuit modifies the AC signal by either accelerating the decrease of the AC current waveform or creating a plateau in the AC voltage waveform to ensure the current falls below the thyristor's holding current before the zero crossing, using a control loop with a controller, current/voltage comparator, PWM generator, and gate driver to generate appropriate gate drive signals for the transistors and thyristors.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If dead time is used to ensure thyristor turn-off before zero-crossing, then reliability is improved, but Total Harmonic Distortion increases

Engineering Contradiction:
Improvethyristor turn-off reliabilityVSAvoidTotal Harmonic Distortion
Core Design Contradiction:
ReliabilityVSObject-generated harmful factors

Solution Approach 1:

The patent modifies the AC current waveform parameters by accelerating its decrease rate during the critical period before zero-crossing. This is achieved through controlled switching of the transistors in the high-frequency branch, which actively shapes the current waveform to ensure it falls below the thyristor holding current faster than natural decay would allow, thereby eliminating the need for dead time and reducing harmonic distortion

Inventive Principle:
Principle #35Parameter changes

Solution Approach 2:

The patent applies preliminary action by pre-shaping the AC current waveform before the zero-crossing event occurs. The control circuit anticipates the zero-crossing point and initiates current reduction actions in advance, accelerating the current decay rate proactively to ensure timely thyristor turn-off without requiring post-action dead time delays

Inventive Principle:
Principle #10Preliminary action

2Device complexity

If conventional control is used without waveform shaping, then device complexity is reduced, but unintended current flow occurs causing damage

Engineering Contradiction:
Improvecontrol circuit complexityVSAvoidunintended current flow
Core Design Contradiction:
Device complexityVSObject-affected harmful factors

Solution Approach 1:

The patent implements feedback control by continuously monitoring the AC current waveform and comparing it with reference values. The control circuit uses this feedback information to dynamically adjust the transistor switching signals, thereby actively controlling the current waveform shape to prevent unintended current flow through the thyristors during zero-crossing transitions

Inventive Principle:
Principle #23Feedback

Solution Approach 2:

The patent introduces dynamic control by making the transistor switching signals adaptive rather than fixed. The control circuit dynamically adjusts the switching timing and duration based on real-time current waveform conditions, enabling the system to actively shape the current decay rate and ensure safe thyristor turn-off under varying operating conditions

Inventive Principle:
Principle #15Dynamics

Data Source

PatentUS12362662B2Commutation assistance by controlling the shape of the current wave in a bidirectional totem pole converter
Publication Date: 2025.07.15 STMICROELECTRONICS INT NV
  • US12362662B2 patent drawing
  • US12362662B2 patent drawing
  • US12362662B2 patent drawing

AI summary

A bidirectional PFC system includes a high-frequency branch with a first transistor connected between an IO node and a high-frequency tap, and a second transistor connected between the high-frequency tap and a reference node, and a low-frequency branch with a first thyristor connected between the IO node and a low-frequency tap, and a second thyristor connected between the low-frequency tap and the reference node. An inductor is connected between the first node and the high-frequency tap. A first capacitor is connected between the first node and the low-frequency tap. The first node and the low-frequency tap are coupled to input terminals. A control circuit generates first and second gate drive signals for the transistors so as to modify an AC signal at the input terminals such that the AC current falls below a holding current of the second thyristor prior to zero crossing of the AC voltage.