Totem Pole PFC Current Shaping for Thyristor Zero-Crossing Commutation
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Solution Overview
Problem
Conventional bidirectional totem pole PFC converters experience unintended current flow during the zero-crossing of the AC waveform, leading to potential damage and inefficiency due to thyristors failing to turn off properly, and the use of dead time to address this issue increases Total Harmonic Distortion (THD).
Innovation Solution
A control circuit generates gate drive signals to accelerate the decrease of the AC current waveform after its peak, ensuring it falls below the thyristor's holding current before the zero crossing, using digital reference and feedback currents, and incorporating a safety margin to minimize THD.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If dead time is introduced to allow thyristor current to fall below holding current before zero crossing, then thyristor turn-off reliability is improved, but Total Harmonic Distortion (THD) increases
Solution Approach 1:
The control circuit accelerates the decrease of AC current waveform after its peak, ensuring the current falls below the thyristor holding current before the zero crossing point is reached. This preliminary action eliminates the need for dead time while ensuring reliable thyristor turn-off.
Solution Approach 2:
The invention modifies the shape of the AC current waveform by changing its decay characteristics after the peak. By controlling the rate of current decrease through the transistors and commutation inductors, the current is forced to decline more rapidly, achieving below-holding-current levels before zero crossing without introducing dead time.
2Object-generated harmful factors
If the AC current waveform is allowed to decay naturally, then THD is minimized, but the thyristor may fail to turn off properly at zero crossing
Solution Approach 1:
The control circuit continuously monitors the AC current waveform and compares it with reference values. Based on this feedback, the control circuit adjusts the gate drive signals to the transistors to accelerate current decay when needed, ensuring the current reaches below-holding-current levels before zero crossing while maintaining waveform quality.
Solution Approach 2:
Commutation inductors are introduced as intermediary elements between the transistors and the AC source. These inductors shape the current waveform by providing controlled impedance, enabling accelerated current decay without directly disrupting the overall waveform shape and THD characteristics.
3Productivity
If transistors are used to shape the current waveform, then power factor correction is achieved, but unintended current flow may occur during zero crossing
Solution Approach 1:
The control circuit preemptively accelerates the current decay after the peak, ensuring that by the time zero crossing occurs, the current through the thyristors has already fallen below their holding current. This prevents unintended current flow paths that would otherwise occur during zero crossing.
Solution Approach 2:
The invention applies a counteracting influence by forcing the current to decrease more rapidly than it would naturally. This preliminary anti-action against the natural current rise prevents the harmful unintended current flow that would occur during zero crossing while maintaining effective power factor correction.
Data Source
AI summary
A power-factor correction system, includes a high-frequency branch with a first-transistor connected between an IO-node and high-frequency tap, and a second-transistor connected between the high-frequency tap and reference-node, and a low-frequency branch with a first-thyristor connected between the IO-node and low-frequency tap, and a second-thyristor connected between the low-frequency tap and reference-node. An inductor is connected between a first-node and the high-frequency tap. A first capacitor is connected between the first-node and the low-frequency tap. The first-node and the low-frequency tap are coupled to input-terminals. A control circuit generates first and second gate-drive signals for the first and second transistors to accelerate a decrease of an AC current waveform at the input-terminals after a peak of a half-cycle of the AC current waveform so the AC current waveform falls below a holding current of the second thyristor prior to a zero crossing of an AC voltage waveform at the input-terminals.