Totem-Pole PFC Circuit Dynamic Switching for Capacitor Safety
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Solution Overview
Problem
Traditional Totem-Pole power factor correction circuits experience significant losses in the rectifier bridge and have large filter circuits, leading to high bus capacitor voltages during no-load or light-load conditions, which can result in capacitor explosion.
Innovation Solution
A power factor correction circuit design that includes bridge arms with switches and inductors, capacitors, and switching units connected in parallel, where the capacitors of the diagonal position have the same capacitance value or switching units are turned off under no-load/light-load to prevent voltage peaks.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Volume of stationary object
If film capacitor is used to reduce filter circuit volume, then the volume of the filter circuit is reduced, but the bus capacitor voltage becomes much higher than normal under no-load or light-load conditions, which may result in capacitor explosion
Solution Approach 1:
The patent applies dynamic control by turning off switching units under no-load or light-load conditions. This dynamic operation mode prevents the bus capacitor voltage from rising to dangerous levels while maintaining the compact filter circuit design using film capacitors.
Solution Approach 2:
The patent changes the operational parameters of the switching units based on load conditions. By adjusting the switching state according to load levels, the system maintains safe bus capacitor voltage while achieving reduced filter circuit volume with film capacitors.
2Device complexity
If traditional boost power factor correction circuit is used, then the circuit structure is simple, but the loss on the rectifier bridge is large, occupying 20% or more of overall loss
Solution Approach 1:
The patent segments the rectifier bridge into multiple switching units with independent control. This segmentation allows selective operation of switching units based on load conditions, significantly reducing rectifier bridge losses while maintaining manageable circuit complexity.
Solution Approach 2:
The patent implements dynamic control of switching units to optimize efficiency. By dynamically adjusting which switching units are active based on load conditions, the system reduces energy losses in the rectifier bridge while maintaining a structured circuit design.
3Loss of energy
If Totem-Pole power factor correction circuit is used, then the loss of the rectifier bridge is greatly reduced, but the bus capacitor voltage becomes much higher than normal under no-load or light-load conditions
Solution Approach 1:
The patent applies dynamic control to the Totem-Pole circuit by turning off switching units under no-load or light-load conditions. This dynamic operation prevents the bus capacitor voltage from rising to dangerous levels while maintaining the low rectifier bridge loss characteristic of the Totem-Pole architecture.
Solution Approach 2:
The patent changes the operational parameters of the switching units based on load conditions in the Totem-Pole circuit. By adjusting the switching state according to load levels, the system maintains both low rectifier bridge loss and safe bus capacitor voltage operation.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design effectively reduces the volume of the filter circuit and prevents sharp increases in output voltage during no-load or light-load conditions, protecting the bus capacitor and improving efficiency.
Implementation Method 1
a first inductor L1 and a second inductor L2, the first bridge arm comprises a first switch S1 and a second switch S2 connected in series, a first node N1 between the first switch S1 and the second switch S2 electrically coupled to the first AC terminal AC1 through the first inductor L1
Implementation Method 2
a first capacitor C1 and a second capacitor C2, the first capacitor C1 having one end connected to a third node N3 between the second inductor L2 and the first inductor L1, and another end connected to the first DC terminal DC1
Data Source
AI summary
The present invention discloses a power factor correction circuit. The power factor correction circuit includes: a first bridge arm having a first switch and a second switch; a second bridge arm having a third switch and a fourth switch; a first inductor and a second inductor; a first capacitor and/or a second capacitor connected with a common point between the second inductor and the first inductor; and a third capacitor and/or a fourth capacitor, the third capacitor connected in parallel to the third switch based on an arrangement of the second capacitor and having a capacitance value same as that of the second capacitor, the fourth capacitor connected in parallel to the fourth switch based on an arrangement of the first capacitor and having a capacitance value same as that of the first capacitor.