Totem-Pole PFC Circuit Voltage Transition Control
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Solution Overview
Problem
Conventional totem-pole PFC circuits generate common mode noise due to limited capacitance of Y capacitors, which cannot be effectively suppressed in applications with strict leakage current restrictions, hindering efficiency improvements in high-power adapters.
Innovation Solution
The totem-pole PFC circuit extends the change time of the voltage on the middle node during AC power polarity changes to greater than 20 μs by controlling the switching speed or sequence of switches, thereby reducing common mode noise.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If the capacitance of the Y capacitor is increased to suppress common mode noise, then the common mode noise is reduced, but the leakage current increases beyond acceptable limits
Solution Approach 1:
The patent changes the time parameter of voltage transitions at the middle node to be longer than a preset time during AC power polarity changes. This temporal parameter modification suppresses common mode noise by reducing voltage jump magnitude without requiring increased Y capacitor capacitance, thereby maintaining acceptable leakage current levels while achieving noise suppression.
2Productivity
If the switching speed of the bridge arm switches is increased to improve efficiency, then the operating frequency increases and efficiency improves, but common mode noise increases due to faster voltage transitions
Solution Approach 1:
The patent selectively modifies the time parameter of voltage transitions at the middle node during polarity changes without affecting the overall switching frequency. By controlling the duration of voltage changes to exceed a preset threshold during polarity transitions, the patent suppresses common mode noise while maintaining high operating frequency and efficiency during normal switching operations.
Solution Approach 2:
The patent applies periodic control to the voltage transition timing at the middle node, ensuring that during AC power polarity changes, the voltage change duration exceeds a preset time. This periodic temporal control creates a rhythm that suppresses common mode noise generation while allowing high-frequency switching to continue during non-polarity phases.
3Device complexity
If conventional boost PFC circuit is used, then the circuit structure is simple, but the rectifier bridge loss accounts for about one-fifth of total loss, limiting efficiency improvement
Solution Approach 1:
The patent employs a totem-pole bridge arm configuration where switches dynamically alternate between on and off states during AC polarity cycles. This dynamic switching arrangement eliminates the need for a traditional rectifier bridge, reducing rectifier bridge loss from one-fifth of total loss to minimal levels while maintaining manageable circuit complexity through controlled dynamic operation.
Data Source
AI summary
A totem-pole PFC circuit is provided. The totem-pole PFC circuit includes an inductor, a first bridge arm and a second bridge arm. The first bridge arm includes a first switch and a second switch connected in series. A first middle node connected between the first and second switches is coupled to a first terminal of an AC power source through the inductor. The second bridge arm connected to the first bridge arm in parallel includes a third switch and a fourth switch connected in series. A second middle node connected between the third and fourth switches is coupled to a second terminal of the AC power source. When a polarity of the AC power source is changed, a change time of a voltage on the second middle node is longer than a preset time not less than 20 μs.