Touch ADC Sampling Circuit for Power Fluctuation Immunity
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Solution Overview
Problem
Existing touch control and analog-to-digital converting systems are affected by power fluctuations during signal transmission and reception in handheld mobile communications devices, leading to erroneous digital values due to interference with the touch panel power voltage.
Innovation Solution
Incorporating a dual sample-and-hold circuit system that samples and holds both the divided voltage and the power voltage before analog-to-digital conversion, ensuring that the conversion process is not affected by power fluctuations, using a combination of sample-and-hold circuits and various types of analog-to-digital converters such as successive approximation, cyclic, sub-ranging, or pipelined converters.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Stability of the object's composition
If a sample-and-hold circuit is included to prevent input voltage changes during conversion, then conversion stability is improved, but the system becomes susceptible to power voltage fluctuation interference
Solution Approach 1:
The patent introduces a second sample-and-hold circuit as an intermediary to sample and hold the power voltage (VDD) separately. This held power voltage is then used by the D/A converter to generate the comparison voltage, isolating the conversion process from power fluctuations. The intermediary circuit breaks the direct connection between power voltage variations and the conversion process, allowing stable conversion even when the power supply fluctuates during signal transmission and reception.
2Adaptability or versatility
If the touch panel power voltage fluctuates during signal transmission and reception, then communication functionality is improved, but the divided voltage ratio becomes erroneous
Solution Approach 1:
The patent dynamically adjusts the comparison voltage generation parameters based on the actual power voltage level. By sampling the power voltage with the second sample-and-hold circuit and using this sampled value to control the D/A converter, the system adapts the comparison voltage to match the current power voltage condition. This parameter adjustment ensures that the ratio between the input voltage and comparison voltage remains accurate even when the power voltage fluctuates during communication operations.
3Measurement precision
If successive approximation conversion is used to achieve high precision, then conversion accuracy is improved, but conversion time increases making the system vulnerable to voltage changes
Solution Approach 1:
The patent performs preliminary sampling and holding of both the input voltage and power voltage before the conversion process begins. By pre-stabilizing these voltage parameters in the sample-and-hold circuits, the system creates a stable voltage foundation for the successive approximation conversion. This preliminary action allows the conversion process to proceed without being interrupted or corrupted by voltage changes, maintaining both high accuracy and efficient timing.
Data Source
AI summary
Disclosed are an analog-to-digital converting apparatus, an analog-to-digital converting method and a touch control apparatus adapted to convert a divided voltage generated according to a power voltage and a ground voltage. The analog-to-digital converting apparatus includes a first sample-and-hold circuit for sampling and holding the divided voltage, a second sample-and-hold circuit for sampling and holding the power voltage, and an analog-to-digital converter coupled to the first and second sample-and-hold circuits. The analog-to-digital converter converts the divided voltage from the first sample-and-hold circuit to a digital value according to the power voltage held by the second sample-and-hold circuit and the ground voltage. The first and second sample-and-hold circuits sample the divided voltage and the power voltage before the analog-to-digital converter converts the divided voltage, and hold the sampled divided voltage and the sampled power voltage at least during conversion of the divided voltage by the analog-to-digital converter.