Touch Display Panel Parasitic Capacitance Reduction
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Solution Overview
Problem
Conventional embedded touch display technology experiences interference and degraded touch performance due to parasitic capacitances between touch leads and electrodes.
Innovation Solution
A touch display panel design where touch electrodes are insulated and connected via touch leads in the same layer, with some electrodes divided into sub-electrodes connected by bridges in a different layer, reducing parasitic capacitances.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Object-affected harmful factors
If touch leads are located in different layers from touch electrodes to reduce interference, then parasitic capacitances are reduced, but device structure becomes more complex
Solution Approach 1:
The patent merges the touch lead and touch electrode into the same layer, eliminating the need for separate layers. This is achieved by designing the touch lead to directly contact the touch electrode in the same conductive layer, thereby reducing parasitic capacitance while avoiding increased structural complexity.
Solution Approach 2:
The patent resolves the layering issue by changing the spatial arrangement within the same layer. Instead of using vertical stacking (different layers), the design uses in-plane routing where touch leads are positioned adjacent to and connected with touch electrodes in the same layer, effectively using horizontal dimensionality to solve the parasitic capacitance problem.
2Object-affected harmful factors
If touch electrodes are divided into sub-electrodes to reduce parasitic capacitance, then touch performance is improved, but electrode structure becomes more complex
Solution Approach 1:
The patent divides touch electrodes into multiple sub-electrodes within the same conductive layer. Each sub-electrode is independently controllable and positioned to minimize overlap with touch leads. This segmentation reduces parasitic capacitance effects while maintaining manageable structural complexity through systematic arrangement.
Solution Approach 2:
The patent applies different configurations to different regions of the touch electrode. Sub-electrodes adjacent to touch leads are designed with specific geometries and positions to minimize parasitic capacitance, while other regions maintain optimal touch sensing characteristics. This localized optimization reduces overall parasitic effects without uniformly complicating the entire electrode structure.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This design minimizes parasitic capacitances, thereby enhancing the touch performance of self-capacitive touch screens by reducing interference between touch leads and electrodes.
Implementation Method 1
parasitic capacitances between the touch leads and the touch electrodes are reduced
Data Source
AI summary
In general, embodiments of the present invention provide systems and methods for a touch display panel and a touch display device including a touch display panel. The touch display panel includes: a substrate, and a common electrode layer located on the substrate. The common electrode layer includes multiple touch electrodes insulated from each other. Each of the touch electrodes is electrically connected to a driving circuit via at least one touch lead. A part of the touch electrodes are divided into multiple sub-electrodes by touch leads adjacent to the divided touch electrodes. The sub-electrodes of each of the touch electrodes are electrically connected to each other via at least one bridge, to reduce parasitic capacitances between the touch leads and the touch electrodes and alleviate an influence from the parasitic capacitances on touch performance.