Touch Display Driving Circuit Power Gating With Fast Wake-Up
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Solution Overview
Problem
Conventional power domain architecture design in integrated circuits requires extensive manual modifications, leading to increased design complexity, high risk of errors, and delayed processes, which complicates the power consumption management and reliability of integrated circuits.
Innovation Solution
The integrated circuit is divided into functional and power consumption control blocks, allowing selective power-off and clock frequency reduction in low-power mode, with the power consumption control block remaining powered on to manage the functional block's power state, including power-off and power-on sequences, and touch detection for quick wake-up.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Use of energy by moving object
If manual modifications and reorganization of RTL code are performed to implement power domain architecture, then power consumption modes can be addressed, but design complexity increases and error risk rises
Solution Approach 1:
The system performs self-service through automated power domain architecture generation. The RTL code automatically generates the power domain architecture without manual intervention, and the verification process is automated through simulation and formality methods, eliminating the need for manual modifications while maintaining power consumption management capabilities
Solution Approach 2:
Manual mechanical processes of RTL code modification and reorganization are replaced by automated computational methods. The system uses computer-based generation of power domain architecture and automated verification processes to substitute the manual mechanical workflow, reducing both complexity and error risk
2Use of energy by moving object
If manual reorganization of logic circuits is performed to separate power-off and continuous power supply areas, then power consumption control is achieved, but design time and resources are significantly consumed
Solution Approach 1:
The power domain architecture is generated in advance through automated processes before the actual power consumption control is needed. The system pre-defines power domains, power-off sequences, and wake-up sequences, so that when power saving is required, the pre-established architecture can be immediately activated without time-consuming manual reorganization
Solution Approach 2:
The manual mechanical process of reorganizing logic circuits is replaced by automated computer-based generation and verification processes. The system uses algorithms to automatically separate power-off and continuous power supply areas, eliminating the need for manual circuit reorganization while maintaining power consumption control
3Use of energy by moving object
If extensive manual modifications are made to RTL code for power domain architecture, then power consumption modes can be implemented, but reliability decreases due to omissions and errors
Solution Approach 1:
The system incorporates feedback mechanisms through automated verification processes. The generated power domain architecture is automatically verified using simulation and formality methods to detect and correct errors before deployment. This closed-loop feedback ensures that power consumption modes are implemented correctly without manual errors
Solution Approach 2:
Manual modifications to RTL code are replaced by automated generation processes that systematically create power domain architecture without human intervention. This substitution eliminates the source of manual errors and omissions, significantly improving design reliability while maintaining power consumption mode functionality
Data Source
AI summary
The preferred embodiment of the present invention relates to an ultra low power integrated circuit, a power saving method for integrated circuit and a touch display driving circuit using the same. The ultra-low power integrated circuit comprises two functional blocks. The first functional block is disposed within the first power ring and stores configuration settings. The power consumption control block is disposed within the second power ring, which is constantly powered on. When switching from normal mode to low power mode, a series of procedures are executed: First, the power consumption control block temporarily stores the configuration settings of the first functional block and cuts off its power supply; it then reduces its own clock frequency and waits for a preset period of time; after that, it increases the clock frequency, powers on the first functional block, and loads the configuration settings; the first functional block then performs a wake-up determination, and if it is not to be woken up, the previous steps are repeated, effectively saving power.


