Touch Panel Non-1:1 Electrode Pitch for Cost Reduction
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Solution Overview
Problem
The high manufacturing cost of display devices with touch panels due to the need for precise alignment of lines on the substrate and bump electrodes of semiconductor chips.
Innovation Solution
A display device design where the connection between the substrate lines and semiconductor chip bump electrodes is established on a non-1:1 basis, with a larger pitch and fewer bump electrodes than connection portions, allowing for reduced alignment accuracy and lower production costs.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 1:1 connection between substrate lines and bump electrodes is implemented, then connection reliability is improved, but manufacturing precision requirements increase and manufacturing cost increases
Solution Approach 1:
The patent implements a non-1:1 connection configuration where multiple substrate lines connect to a single bump electrode or vice versa. This partial connection approach reduces the total number of connection points requiring precise alignment, thereby lowering manufacturing precision requirements while maintaining adequate connection reliability through redundant connection paths.
Solution Approach 2:
The patent changes the connection ratio parameter from strict 1:1 to non-1:1 relationships. By adjusting the number of substrate lines per bump electrode and the arrangement pitch of connection portions, the design achieves relaxed alignment requirements while preserving electrical connection functionality.
2Manufacturing precision
If accurate alignment of lines and bump electrodes is performed, then connection accuracy is improved, but manufacturing cost increases
Solution Approach 1:
The patent employs a configuration where not all substrate lines need to be precisely aligned with corresponding bump electrodes. By implementing a many-to-one or one-to-many connection scheme, the manufacturing process tolerates larger alignment deviations, significantly reducing the cost of precise alignment operations.
Solution Approach 2:
The patent segments the connection function by distributing multiple substrate lines to serve multiple bump electrodes in a non-corresponding manner. This segmentation allows each connection point to be less critical, reducing the overall manufacturing precision requirement and associated costs.
3Ease of manufacture
If larger pitch of bump electrodes is used, then manufacturing cost is reduced, but connection density decreases
Solution Approach 1:
The patent uses a non-1:1 connection ratio to compensate for the larger pitch between bump electrodes. By having multiple substrate lines connect to each bump electrode or having fewer bump electrodes serve multiple lines, the effective connection density is maintained despite the increased physical pitch, thereby reducing manufacturing cost without sacrificing functional density.
Data Source
AI summary
The present invention realizes the reduction of cost of a display device having a touch panel. The display device having a touch panel includes a display panel, and a touch panel which is arranged on the display panel in an overlapping manner in plane. The touch panel includes a first substrate and a second substrate which are arranged to face each other with spacers sandwiched therebetween, and a first semiconductor chip which is mounted on the first substrate. The first substrate includes, on a surface side thereof which faces the second substrate, a plurality of first lines which is arranged parallel to each other in the first direction, a first chip mounting region on which the first semiconductor chip is mounted, and a plurality of first connection portions each of which is constituted of a portion of each line in the plurality of first lines, the first semiconductor chip includes a plurality of first bump electrodes which is arranged in one direction, the plurality of first connection portions are arranged in the arrangement direction of the plurality of first bump electrodes within the first-chip mounting region, and an arrangement pitch of the plurality of first bump electrodes is set larger than an arrangement pitch of the plurality of first connection portions.


