Touch Panel Pin Layout for Low-Interference Signal Routing

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Solution Overview

Problem

Existing touch panels, particularly capacitive On Cell type, face challenges in optimizing the arrangement and connectivity of pins and signal lines, leading to inefficiencies in signal transmission and panel performance.

Innovation Solution

A novel arrangement of pins and signal lines in the touch panel, including symmetrically arranged touch signal lines and pins, staggered pin configurations, and multi-row arrangements, enhancing connectivity and signal transmission efficiency.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If pins and signal lines are arranged in conventional configurations, then the basic functionality of the touch panel is achieved, but signal transmission efficiency is insufficient and signal interference occurs

Engineering Contradiction:
Improvesignal transmission efficiencyVSAvoidpin and signal line arrangement complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent applies asymmetric arrangement of touch signal lines and pins, where the signal lines are positioned at specific locations that are not symmetrically distributed. This asymmetric configuration optimizes the signal transmission path and reduces interference between adjacent signal lines, thereby improving signal transmission efficiency while managing the complexity through deliberate non-uniform placement

Inventive Principle:
Principle #4Asymmetry

Solution Approach 2:

The patent introduces multi-row arrangements of pins and signal lines, transitioning from conventional single-row or simple grid configurations to multiple rows. This dimensional change allows for better spatial separation of signal lines, reduced crosstalk, and improved signal transmission efficiency by utilizing three-dimensional space more effectively in the layer structure

Inventive Principle:
Principle #17Another dimension (Dimensionality change)

2Area of stationary object

If pins and signal lines are densely arranged to reduce panel size, then compactness is achieved, but signal interference increases and transmission efficiency decreases

Engineering Contradiction:
Improvepanel areaVSAvoidsignal interference
Core Design Contradiction:
Area of stationary objectVSObject-affected harmful factors

Solution Approach 1:

The patent segments the pin and signal line arrangements into distinct regions and rows, with different types of pins (display pins and touch pins) separated into specific zones. This segmentation allows dense overall packing while maintaining sufficient separation between signal lines of different types, reducing interference and enabling compact panel design

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent applies different arrangement qualities to different regions of the panel. In areas where signal lines are densely packed, specific local configurations are used to minimize interference, while other regions have adjusted spacing. This local optimization allows overall compactness while preventing signal interference in critical areas

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS12468414B2Touch panel and preparation method therefor, and display apparatus
Publication Date: 2025.11.11 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US12468414B2 patent drawing
  • US12468414B2 patent drawing
  • US12468414B2 patent drawing

AI summary

Disclosed are a touch panel, a preparation method therefor, and a display apparatus. The touch panel includes a touch region and a bonding region on a side of the touch region in a first direction. The bonding region includes: a chip region including a first edge, a second edge, a third edge, and a fourth edge, the first and second edges extend along a second direction, and the first direction intersects the second direction; multiple pins in the chip region and including multiple display pins and multiple touch pins, the multiple display pins are arranged along the first and second edges, the multiple touch pins are arranged along the third and fourth edges, and the multiple display pins are configured to be connected with display signal lines; multiple touch electrodes in the touch region; and multiple touch signal lines in the touch region and the bonding region.