Touch Panel Via Filling Part for Yield Improvement
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Solution Overview
Problem
Touch panels with low-temperature poly-silicon thin film transistors face yield reduction due to the deep vias between pixel electrodes and drains, leading to easy breakage and connectivity issues.
Innovation Solution
A touch panel design featuring a filling part with a metal or alloy material that reduces the depth of the via between the pixel electrode and the drain, connected through a second via on an isolating layer, enhancing connectivity and reducing resistance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If the separator between the pixel electrode and the drain is made thicker, then the via depth increases, but the pixel electrode is more prone to breakage and connectivity issues
Solution Approach 1:
The patent introduces a filling part as an intermediary component that fills the via space between the pixel electrode and the drain. This filling part serves as a mediator that reduces the effective via depth while maintaining electrical connectivity, thereby preventing pixel electrode breakage without compromising the connection reliability.
2Stability of the object's composition
If the via depth is increased to separate the pixel electrode and drain, then the structural separation is improved, but the resistance between the pixel electrode and drain increases
Solution Approach 1:
The patent employs a filling part made of conductive material that composite the via structure. This composite structure maintains the structural separation between the pixel electrode and drain while providing low-resistance electrical connectivity through the filling part, thus resolving the contradiction between structural separation and electrical resistance.
Data Source
AI summary
The disclosure is related to a touch panel including a substrate; a low-temperature poly-silicon layer, a first isolating layer, a gate and a second isolating layer arranged in sequence and disposed on a surface of the substrate; a source and a drain disposed on the second isolating layer, the source and the drain disposed separately and respectively connected to the low-temperature poly-silicon layer through a through hole; a planar layer disposed on the source, the drain and the second isolating layer, the planar layer having a first via corresponding to the drain; a filling part filling the first via and the filling part electrically connected to the drain; a third isolating layer disposed on the planar layer, the third isolating layer having a second via corresponding to the filling part; a pixel electrode disposed on the third isolating layer and electrically connected to the filling part through the second via.