Touch Sensor Parasitic Capacitance Reduction in Display Devices
Find Innovative SolutionsGenerate Solutions
Solution Overview
Problem
In display devices with built-in touch sensors, parasitic capacitance from electrodes and signal lines increases touch driving load and lowers touch sensing accuracy, potentially making touch sensing impossible.
Innovation Solution
A display device design that includes a substrate with thin film transistors, pixel electrodes, common electrode blocks, touch sensing lines, and planarization layers to reduce parasitic capacitance, where the side surface of planarization layers exposed through pixel contact holes contacts the upper protective film and pixel electrodes, spacing touch sensing lines and common electrode blocks with inorganic and organic insulating materials to minimize capacitance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Length of moving object
If touch sensors are installed within the display panel to satisfy slimness requirements, then the display device achieves a thinner profile, but parasitic capacitance increases due to electrodes and signal lines arranged around the touch sensors
Solution Approach 1:
The patent extracts the harmful electrodes and signal lines from the vicinity of the touch sensors by routing them outside the touch sensing area. The touch sensing lines are positioned in the non-display area, and the common electrode blocks are arranged to minimize overlap with signal lines, thereby removing the source of parasitic capacitance while maintaining the thin display profile.
Solution Approach 2:
The patent introduces planarization layers as intermediary structures between the touch sensing lines and the common electrode blocks. These planarization layers act as insulating mediators that reduce the electric field coupling between adjacent conductive elements, thereby minimizing parasitic capacitance formation while allowing the thin display structure to be maintained.
2Measurement precision
If parasitic capacitance is reduced by spacing electrodes and signal lines, then touch sensing accuracy improves, but the device complexity increases due to additional planarization layers and routing structures
Solution Approach 1:
The planarization layers serve multiple functions simultaneously: they provide electrical insulation between conductive elements to reduce parasitic capacitance, they flatten the surface for proper positioning of upper layers, and they structurally support the thin display construction. This multi-functionality reduces the need for additional separate components, thereby limiting the increase in device complexity.
Solution Approach 2:
The patent combines the insulation function with the planarization function into a single integrated layer structure. Rather than adding separate insulation layers on top of planarization layers, the design merges these functions into the planarization layers themselves, which are positioned to provide both surface flattening and electrical isolation, thereby reducing overall structural complexity.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
The design reduces parasitic capacitance, improving touch sensing accuracy and reducing the touch driving load without affecting liquid crystal or storage capacitance, thereby enhancing the performance of touch sensing in display devices.
Implementation Method 1
an upper planarization layer between the plurality of touch sensing lines and one of: the plurality of pixel electrodes and the plurality of common electrode blocks, an upper protective film between the plurality of pixel electrodes and the plurality of common electrode blocks
Implementation Method 2
a plurality of common electrode blocks on the substrate, each of the plurality of common electrode blocks being configured to form an electric field with respective ones of the plurality of pixel electrodes
Implementation Method 3
a plurality of pixel electrodes respectively connected to the a plurality of thin film transistors, a plurality of common electrode blocks on the substrate, each of the plurality of common electrode blocks being configured to form an electric field with respective ones of the plurality of pixel electrodes
Data Source
AI summary
A display device includes: thin film transistors (TFTs) on a substrate, pixel electrodes (PEs) respectively connected to the TFTs, common electrode blocks (CEBs) on the substrate, each CEB forming an electric field with a respective PE, touch sensing lines (TSLs) respectively connected to the CEBs, a lower planarization layer (PL) between the TFTs and the TSLs, an upper PL between the TSLs and one of: the PEs and the CEBs, an upper protective film between the PEs and the CEBs, and pixel contact holes extending through the lower PL and the upper PL to expose respective drain electrodes of the TFTs, wherein a side surface of each of the lower PL and the upper PL, exposed through the pixel contact holes, contacts one of: the upper protective film and the PEs.