Touch Sensor Display Gate Line Overlap Parasitic Capacitance

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Solution Overview

Problem

The existing touch sensor integrated type display devices suffer from the generation of defective images with horizontal lines due to parasitic capacitance differences between gate lines and touch/common electrodes, which affects the stability of the common voltage and image quality.

Innovation Solution

The solution involves overlapping a gate line between adjacent touch/common electrodes to minimize parasitic capacitance by ensuring that a gate line corresponding to pixel electrodes of a subsequent row overlaps with the touch/common electrode of the previous stage, thereby stabilizing the common voltage and preventing defective images.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Object-affected harmful factors

If gate lines are positioned between adjacent touch/common electrodes to avoid parasitic capacitance, then parasitic capacitance is reduced, but ripple voltages occur at the boundaries causing defective horizontal lines in the display

Engineering Contradiction:
Improveparasitic capacitanceVSAvoidimage quality
Core Design Contradiction:
Object-affected harmful factorsVSReliability

Solution Approach 1:

The patent applies the principle of converting harm into benefit by intentionally positioning gate lines to overlap with touch/common electrodes, thereby converting the harmful parasitic capacitance into a beneficial compensatory mechanism. The gate line overlap creates controlled parasitic capacitance that generates compensatory ripple voltages to counteract the harmful ripple voltages occurring at touch/common electrode boundaries, thus improving image quality while managing parasitic capacitance effects.

Inventive Principle:
Principle #22Blessing in disguise (Convert harm into benefit)

Solution Approach 2:

The patent implements preliminary anti-action by pre-positioning gate lines to overlap with specific touch/common electrodes in a predetermined pattern before operation. This preliminary configuration ensures that compensatory ripple voltages are generated in advance to counteract the harmful effects that would otherwise occur at boundaries, preventing defective horizontal lines before they appear in the display.

Inventive Principle:
Principle #9Preliminary anti-action

2Reliability

If gate lines overlap with touch/common electrodes, then ripple voltages are compensated and image quality improves, but parasitic capacitance increases

Engineering Contradiction:
Improveimage qualityVSAvoidparasitic capacitance
Core Design Contradiction:
ReliabilityVSObject-affected harmful factors

Solution Approach 1:

The patent applies local quality by creating non-uniform distribution of gate line overlaps with touch/common electrodes. Specifically, gate lines overlap with touch/common electrodes of subsequent stages in a controlled manner while maintaining gaps in other regions. This localized overlap strategy concentrates parasitic capacitance generation in specific areas where it provides compensatory benefits, rather than uniformly distributing it throughout the display structure.

Inventive Principle:
Principle #3Local quality

Solution Approach 2:

The patent implements asymmetry by creating an asymmetric positioning relationship between gate lines and touch/common electrodes. The gate lines are positioned to overlap with touch/common electrodes of subsequent stages rather than symmetrically between all adjacent electrodes. This asymmetric configuration optimizes the compensatory ripple voltage generation while managing overall parasitic capacitance levels.

Inventive Principle:
Principle #4Asymmetry

3Length of moving object

If touch/common electrodes are used as common electrodes to reduce display device thickness, then the display device achieves a thin profile, but parasitic capacitance differences cause unstable common voltage

Engineering Contradiction:
Improvedisplay device thicknessVSAvoidcommon voltage stability
Core Design Contradiction:
Length of moving objectVSStability of the object's composition

Solution Approach 1:

The patent applies dynamics by creating a dynamic compensation mechanism where gate line overlaps with touch/common electrodes generate variable ripple voltages that actively counteract common voltage fluctuations. The overlapping configuration enables the system to dynamically respond to voltage instability by utilizing the parasitic capacitance-induced ripple voltages to compensate for common voltage changes, thereby maintaining stability despite the thin-profile design.

Inventive Principle:
Principle #15Dynamics

Solution Approach 2:

The patent implements parameter changes by deliberately modifying the spatial relationship parameter between gate lines and touch/common electrodes. By changing the position parameter to create controlled overlaps, the system alters the parasitic capacitance characteristics to generate compensatory effects that stabilize common voltage, enabling thin-profile design without sacrificing voltage stability.

Inventive Principle:
Principle #35Parameter changes

Applied Scientific Principles

This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.

Function Achieved in This Case

This configuration effectively removes ripple voltages at the boundary between touch/common electrodes, preventing the display of bright horizontal lines and ensuring a stable common voltage, thus enhancing the image quality by compensating for parasitic capacitance differences.

Implementation Method 1

parasitic capacitance between gate line and data lines constituting the display device is very large

Methodology Applied
Scientific EffectParasitic capacitance: Parasitic Capacitance

Data Source

PatentUS10152156B2Touch sensor integrated type display device
Publication Date: 2018.12.11 LG DISPLAY CO LTD
  • US10152156B2 patent drawing
  • US10152156B2 patent drawing
  • US10152156B2 patent drawing

AI summary

A touch sensor integrated type display device can include a plurality of gate lines and a plurality of data lines crossing over each other, a plurality of pixel electrodes respectively disposed in areas defined by the crossing of the gate and data lines; a plurality of touch/common electrodes configured to form an electronic field together with the plurality of pixel electrodes, each touch/common electrode corresponds to p number of pixel electrodes arranged in a row direction and q number of pixel electrodes arranged in a column direction, in which p and q are natural numbers equal to or greater than two, and a plurality of touch/common lines respectively connected to the plurality of touch/common electrodes, in which a gate line corresponding to pixel electrodes of a q-th row overlaps a touch/common electrode of a subsequent stage following a touch/common electrode corresponding to the pixel electrodes of the q-th row.