Touch Wire Layout on Encapsulation Transition Surfaces in Display Panels

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Solution Overview

Problem

In the manufacturing of display panels with integrated touch and display technologies, the photolithographic process for forming touch wires results in non-uniform thickness of the photoresist layer due to gravity, leading to critical dimension bias and potential short circuits, and incomplete encapsulation of grooves on the display substrate, which affects the integrity and functionality of the touch wires.

Innovation Solution

The display panel design includes a first barrier wall and a blocking portion surrounding the display area, with a first encapsulation layer having a transition surface that adapts to the shape of the blocking portion, ensuring the touch wires are positioned on a flatter surface of the encapsulation layer, thereby maintaining uniform thickness and preventing short circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Adaptability or versatility

If photolithographic process is used to form touch wires directly on TFE layer, then touch functionality is integrated with display, but photoresist layer thickness becomes non-uniform due to gravity

Engineering Contradiction:
Improveintegration of touch and displayVSAvoidphotoresist layer thickness uniformity
Core Design Contradiction:
Adaptability or versatilityVSManufacturing precision

Solution Approach 1:

The patent introduces a planarization layer formed before the photolithographic process to pre-compensate for the non-uniform photoresist thickness. This preliminary structural preparation ensures that even though gravity causes non-uniform photoresist deposition, the underlying planarization layer provides a compensating structure that maintains overall uniformity of the combined layers, thereby resolving the contradiction between integration and manufacturing precision.

Inventive Principle:
Principle #10Preliminary action

2Ease of manufacture

If photolithographic process is used for touch wire formation, then manufacturing process is simplified, but critical dimension bias occurs leading to potential short circuits

Engineering Contradiction:
Improveprocess simplicityVSAvoidtouch wire integrity
Core Design Contradiction:
Ease of manufactureVSReliability

Solution Approach 1:

The patent introduces an intermediary planarization layer that acts as a mediator between the substrate and the photoresist layer. This intermediate structure compensates for the critical dimension bias caused by non-uniform photoresist thickness, preventing short circuits while maintaining the simplicity of the photolithographic process. The planarization layer serves as a buffer that ensures reliable touch wire formation without complicating the manufacturing process.

Inventive Principle:
Principle #24Intermediary (Mediator)

3Reliability

If blocking portion completely surrounds display area, then encapsulation is improved, but touch lead region accessibility is reduced

Engineering Contradiction:
Improveencapsulation integrityVSAvoidtouch lead region accessibility
Core Design Contradiction:
ReliabilityVSEase of operation

Solution Approach 1:

The patent applies local quality by making the blocking portion asymmetric: it completely surrounds the display area in most regions to provide excellent encapsulation, but intentionally creates an opening in the touch lead region to maintain accessibility. This localized modification allows the blocking portion to have different functions in different areas - complete enclosure for protection and selective opening for electrical connection access.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS20260007035A1Display panel and display apparatus
Publication Date: 2026.01.01 CHENGDU BOE OPTOELECTRONICS TECH CO LTD
  • US20260007035A1 patent drawing
  • US20260007035A1 patent drawing
  • US20260007035A1 patent drawing

AI summary

A display panel includes: a display substrate, a first barrier wall surrounding a display area, a blocking portion between the first barrier wall and the display area, a first encapsulation layer covering at least the display area, and touch wires. The blocking portion at least partially surrounds the display area. The first encapsulation layer includes a first surface, a second surface and a transition surface located therebetween. On the display substrate, orthographic projections of the touch wires at least partially overlap with an orthographic projection of the second surface; and at least a portion of an orthographic projection of the transition surface is located in a region between a border, away from the display area, of an orthographic projection of the blocking portion and the display substrate and an orthographic projection of an edge of the first surface on the display substrate farthest away from the display area.