TPM-LAN Chip Power Management via Segmentation

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Solution Overview

Problem

Current TPM-LAN chip solutions are expensive and have a large footprint due to excessive power consumption from shared resources that cannot be fully isolated, making them unsuitable for desktop and laptop applications.

Innovation Solution

An integrated TPM-LAN microprocessor with separate TPM and LAN power management, utilizing a monitoring circuit to dynamically switch clock sources and shut down unnecessary components, allowing for independent operation and power saving modes.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Area of stationary object

If TPM and LAN module are integrated on a single chip, then cost is reduced and footprint is minimized, but power consumption increases due to inability to isolate and shut down shared resources

Engineering Contradiction:
Improvechip footprintVSAvoidpower consumption
Core Design Contradiction:
Area of stationary objectVSUse of energy by stationary object

Solution Approach 1:

The patent divides the integrated TPM-LAN chip into separate functional blocks with independent power management capabilities. The TPM module and LAN module are segmented such that each can be independently enabled or disabled through separate power control circuits, allowing the system to shut down only the necessary portion while keeping the other active, thereby reducing overall power consumption while maintaining the integrated chip structure.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent implements dynamic power management by introducing power control circuits that can dynamically adjust the power state of different modules based on operational requirements. The system transitions from static power consumption to dynamic power consumption where the power supply state can be changed in real-time according to whether TPM or LAN functions are currently in use, optimizing energy efficiency.

Inventive Principle:
Principle #15Dynamics

2Device complexity

If shared resources are used in integrated TPM-LAN chip, then device complexity is reduced, but power consumption increases because resources cannot be fully isolated

Engineering Contradiction:
Improvechip structureVSAvoidpower waste
Core Design Contradiction:
Device complexityVSLoss of energy

Solution Approach 1:

The patent segments shared resources into dedicated power domains, allowing the TPM and LAN modules to each have their own power control. This segmentation enables independent power management while maintaining a relatively simple integrated chip structure, preventing power waste by ensuring that inactive modules do not consume power through shared resource leakage.

Inventive Principle:
Principle #1Segmentation

Solution Approach 2:

The patent introduces power control circuits as intermediary components between the power supply and the TPM/LAN modules. These intermediary circuits act as switches or regulators that can isolate power flow to specific modules based on operational needs, enabling energy isolation without requiring complete resource separation and thus minimizing power waste while maintaining structural simplicity.

Inventive Principle:
Principle #24Intermediary (Mediator)

Data Source

PatentUS8762758B2Apparatus and method for TPM and LAN power management
Publication Date: 2014.06.24 AVAGO TECHNOLOGIES INTERNATIONAL SALES PTE LTD
  • US8762758B2 patent drawing
  • US8762758B2 patent drawing
  • US8762758B2 patent drawing

AI summary

In Gigibit Ethernet Systems, the Trusted Platform Module (TPM) is designed to provide trust and security to a platform through integrity measurement, protected storage, and other cryptographic functions. The present invention relates to a TPM-LAN chip with separate TPM and LAN power management. The TPM-LAN chip is designed such a way that power is reduced significantly in different power management modes compared to the legacy devices. This is accomplished by turning off certain clocks during certain operating modes.