Multi-Microcontroller Trace Alignment Using TSN Clock Synchronization
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Solution Overview
Problem
Analyzing trace data from multiple interacting microcontrollers in computer-controlled systems is challenging due to insufficient synchronization of local clocks, making it difficult to discern the actual temporal order of operations and diagnose complex bugs.
Innovation Solution
Implementing a time-sensitive packet-switched networking protocol like TSN Ethernet for synchronization of local clocks across microcontrollers, using a grandmaster clock and precision time protocol to ensure precise timestamp alignment, and encapsulating trace data in Ethernet frames for synchronized analysis.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Ease of operation
If each microcontroller uses its own independent local clock for timestamping operations, then each microcontroller can autonomously generate trace data, but the timestamps from multiple microcontrollers cannot be accurately synchronized, making it difficult to discern the actual temporal order of operations
Solution Approach 1:
The patent introduces a network time protocol as an intermediary mechanism that allows multiple microcontrollers to synchronize their local clocks through communication. A designated master clock provides reference time signals to slave microcontrollers, enabling them to adjust their timestamps to a common timebase while maintaining autonomous operation. This resolves the contradiction by adding a coordination layer without eliminating individual autonomy.
Solution Approach 2:
The patent implements dynamic clock synchronization where microcontrollers continuously adjust their local clock offsets based on network time protocol signals. Rather than using fixed independent clocks, the system dynamically synchronizes timestamps across the network, allowing accurate temporal ordering of operations while preserving the benefit of distributed autonomous operation.
2Productivity
If trace data from multiple microcontrollers is analyzed without clock synchronization, then analysis can proceed with simple independent processing, but complex bugs involving multiple interacting microcontrollers cannot be accurately diagnosed
Solution Approach 1:
The patent applies preliminary clock synchronization before trace data collection begins. By establishing synchronized timebases in advance through the network time protocol, the system ensures that timestamps are already aligned when operations occur. This preliminary action enables accurate temporal ordering and bug diagnosis without requiring complex post-processing adjustments, thus maintaining high productivity while improving reliability.
3Measurement precision
If a centralized clock synchronization system is implemented across all microcontrollers, then accurate timestamp alignment is achieved, but system complexity and communication overhead increase
Solution Approach 1:
The patent segments the synchronization infrastructure into a hierarchical master-slave architecture rather than requiring a fully centralized system. A master clock handles time generation, while slave microcontrollers independently receive and apply time adjustments. This segmentation reduces the complexity burden on any single component while maintaining accurate synchronization across all devices.
Solution Approach 2:
The patent changes the operational parameters of local clocks from completely independent to dynamically adjustable. Through network time protocol, clocks modify their frequency and offset parameters in real-time to synchronize with the master clock. This parameter-based approach achieves accurate timestamps without requiring complex hardware modifications, thus improving precision while limiting the increase in system complexity.
Data Source
AI summary
Some aspects of the present disclosure relate to a tracing system including a tracing tool connected to a set of target devices. Each target device includes a local clock, a first counter, a second counter, a network port, a set of one or more system resources that perform operations, and a trace unit. The network port generates a timing signal from the received network-synchronizing timing frames. The trace unit advances the second counter and resets the first counter based on the timing signal. The trace unit generates local trace records having a timestamp based on the first counter, a corresponding system resource, and a corresponding operation, and provides them to the network port for forwarding to the tracing tool. The tracing tool receives the local trace records from target devices of the set of target devices, and generates a global set of trace records ordered by corresponding timestamps.