Trace Buffer for Overlay Circuit Introspection on System-on-Chip

Resolve Bottlenecks,
Find Innovative Solutions
Generate Solutions

Solution Overview

Problem

Current integrated circuits (ICs) lack a flexible and efficient platform for developing and managing overlays, which are pre-compiled bitstreams specifying circuit designs, due to complex host-target environments and the need for specialized tools, limiting productivity and hardware trace capabilities.

Innovation Solution

A system-on-chip (SOC) IC with programmable circuitry and a processor that executes a framework providing high-productivity language control, allowing for the implementation, management, and tracing of overlays, including a trace buffer for generating and storing trace data, and the ability to dynamically modify or implement new circuits.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If a complex host-target environment with specialized tools is used for overlay development, then hardware trace and control capabilities are achieved, but device complexity and ease of operation deteriorate

Engineering Contradiction:
Improvehardware trace capabilityVSAvoidhost-target environment complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The patent extracts the trace buffer and introspection capabilities from the overlay circuitry itself, allowing the main processor to perform tracing functions without requiring complex external tools or environments. The trace buffer is integrated within the programmable circuitry, enabling self-contained hardware trace functionality.

Inventive Principle:
Principle #2Taking out (Extraction)

Solution Approach 2:

The framework acts as an intermediary layer between the processor and the overlay circuitry, providing high-level language control for implementing overlays. This framework simplifies the interaction between software and hardware, reducing the need for complex host-target environments while maintaining hardware trace capabilities.

Inventive Principle:
Principle #24Intermediary (Mediator)

2Manufacturing precision

If specialized tools are used for overlay management, then hardware control precision is improved, but ease of operation deteriorates

Engineering Contradiction:
Improveoverlay implementation precisionVSAvoidoverlay management ease
Core Design Contradiction:
Manufacturing precisionVSEase of operation

Solution Approach 1:

The system enables self-service overlay management through the framework that provides high-productivity language control. The processor can directly control and manage overlay implementation through the framework, eliminating the need for external specialized tools while maintaining precise control over overlay management.

Inventive Principle:
Principle #25Self-service

Solution Approach 2:

The framework provides universal control mechanisms that work across different overlay types and hardware configurations. This multi-functional framework handles various overlay management tasks through a single integrated interface, improving ease of operation while maintaining precision.

Inventive Principle:
Principle #6Universality (Multi-functionality)

3Adaptability or versatility

If runtime allocated memory is used for trace data, then adaptability is improved, but loss of time for data access increases

Engineering Contradiction:
Improvememory allocation flexibilityVSAvoidtrace data access time
Core Design Contradiction:
Adaptability or versatilityVSLoss of time

Solution Approach 1:

The framework performs preliminary actions by pre-establishing memory allocation strategies and trace buffer configurations before runtime operations. This allows for efficient memory management and reduces the time required for trace data access while maintaining adaptability through configurable allocation parameters.

Inventive Principle:
Principle #10Preliminary action

Data Source

PatentUS10474610B1Hardware trace and introspection for productivity platform using a system-on-chip
Publication Date: 2019.11.12 XILINX INC
  • US10474610B1 patent drawing
  • US10474610B1 patent drawing
  • US10474610B1 patent drawing

AI summary

An integrated circuit can include programmable circuitry configured to implement an overlay circuit specified by an overlay. The overlay circuit can include a trace buffer configured to receive a probed signal from circuitry within the overlay circuit. The trace buffer can be configured to generate trace data from the probed signal and store the trace data in a runtime allocated memory. The integrated circuit also can include a processor coupled to the programmable circuitry and configured to control operation of the trace buffer. The processor can be configured to read the trace data from the runtime allocated memory.