Trace Data Processing Using DMA Controller and On-Off Chip Buffering

The patent segments the tracing system into on-chip components (trace buffer, trace controller) and off-chip components (trace port). The on-chip trace buffer stores trace data locally with high bandwidth, while the off-chip trace port provides extended bandwidth capacity. This segmentation allows the system to achieve high bandwidth without the prohibitive costs of fully off-chip tracing, as only the buffer and controller need be on-chip while leveraging cost-effective off-chip I/O for high-speed data output.

The patent introduces an intermediary trace buffer and trace controller that mediate between the on-chip processing elements and off-chip I/O. This intermediary layer enables efficient data transfer by buffering trace data on-chip and managing the transfer to off-chip ports, thereby achieving high bandwidth utilization without requiring all components to be off-chip, thus reducing overall system cost while maintaining high productivity.

The patent extends the trace buffer capacity by adding an off-chip dimension to the traditionally on-chip buffer. The trace buffer is implemented as a distributed memory system spanning both on-chip and off-chip domains, allowing trace data to be stored with extended duration while maintaining high bandwidth access. This dimensional extension resolves the contradiction by providing both the speed of on-chip access and the capacity for longer-duration tracing.

The trace buffer is segmented into on-chip and off-chip portions, with the on-chip portion providing fast access for high bandwidth and the off-chip portion providing extended storage duration. The trace controller manages data placement and retrieval across these segments, enabling the system to achieve both high bandwidth (via on-chip access) and extended trace buffer duration (via off-chip storage capacity).