Trace Logic Branch Packet Synchronization
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Solution Overview
Problem
Current debugging processes for software applications are inefficient in transferring branch information from target hardware to host computers, leading to unsynchronized and incomplete data streams during debugging and testing.
Innovation Solution
A system and method that utilize a trace logic to generate branch packets with branch bits, where invalid bits are flushed with a common bit inverse of a valid bit, ensuring efficient transfer and synchronization of branch information by inserting branch packets into data streams before sync points, and adjusting sync points with branch packet bits for accurate decoding.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If branch information is transferred from target hardware to host computer during debugging, then debugging capability is enabled, but data streams become unsynchronized and incomplete
Solution Approach 1:
The patent applies preliminary action by inserting branch packets into data streams before sync points are reached. The trace logic monitors the data stream and proactively inserts branch packets containing branch information ahead of time, allowing the host computer to pre-process this information and maintain synchronization without waiting for sync points to occur naturally.
Solution Approach 2:
The patent uses an intermediary approach by introducing a trace logic component that acts as a mediator between the target hardware and host computer. This trace logic captures branch information, packages it into branch packets, and inserts these packets into the data stream at appropriate locations, facilitating reliable information transfer while maintaining stream synchronization.
2Loss of information
If branch packets are inserted into data streams before sync points, then data completeness is improved, but data stream complexity increases
Solution Approach 1:
The patent applies local quality by making branch packets self-describing with embedded metadata that identifies their position and validity. Each branch packet contains information about its location in the instruction stream and validity flags, allowing the host computer to process only relevant packets without increasing overall system complexity. This localized information encoding maintains data completeness while managing stream complexity.
Solution Approach 2:
The patent segments branch information into discrete branch packets that are independently processable units. Each packet contains specific branch information and validity markers, allowing the host computer to handle complete packets atomically. This segmentation prevents information loss while keeping individual packet structures manageable and the overall data stream organized.
3Reliability
If invalid branch bits are flushed with common bits, then data integrity is maintained, but information transfer efficiency decreases
Solution Approach 1:
The patent uses parameter changes by encoding invalid branch bits with a specific common bit value (typically all 1s or all 0s) that distinguishes them from valid branch information. This parameter encoding allows the host computer to quickly identify and discard invalid bits using simple comparison operations, maintaining data integrity while minimizing processing time compared to more complex validation methods.
Data Source
AI summary
A system comprising a processor adapted to execute software code comprising branch instructions and a trace logic coupled to the processor and adapted to generate a branch packet comprising branch bits. At least some of the branch bits are associated with branch instructions executed by the processor. The trace logic flushes invalid branch bits in the branch packet with a common bit, the common bit an inverse of a valid branch bit. The trace logic outputs the branch packet with an indicator comprising the valid branch bit.