Trace Receiver Data Compression for Emulation Storage
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Solution Overview
Problem
Current processor and memory emulation technologies face challenges in accurately modeling cache events and system interactions, leading to performance discrepancies between simulated and actual target performance, especially with cache-based architectures, which affects developer confidence and debugging efficiency.
Innovation Solution
The implementation of advanced emulation features, including trace data compression, adaptive clock calibration, and multi-channel trace recording, provides enhanced visibility and monitoring capabilities for system and memory behavior, enabling better debug and profiling tools for cache coherence and DMA events.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Speed
If trace data is transmitted in a wider format (e.g., 10 8-bit packets), then the trace receiver can process data at higher rates, but the storage requirements and data volume increase significantly
Solution Approach 1:
The patent applies composite encoding by combining multiple trace words into a single compressed packet. Instead of transmitting individual trace words separately, the system packs multiple words (e.g., 4 words) into one compressed packet format, reducing the total number of packets transmitted while maintaining data integrity and processing efficiency.
Solution Approach 2:
The patent changes the parameter of data representation by using variable-length encoding and compression algorithms. The trace data is transformed from fixed-width individual words into variable-length compressed packets, where the packet structure adapts based on the actual data content, thereby reducing overall data volume while preserving information.
2Measurement precision
If advanced emulation features are added to provide visibility into cache events and system interactions, then debugging and profiling capabilities improve, but device complexity and modeling accuracy requirements increase
Solution Approach 1:
The patent segments the complex trace data into distinct, organized packets with specific formats for different types of information (e.g., timing data, control data, event data). This segmentation allows the emulation system to handle complex monitoring requirements through modular packet structures, reducing overall system complexity while maintaining high measurement precision.
Solution Approach 2:
The patent introduces compressed trace packets as an intermediary representation between the actual system events and the debugging tools. These packets serve as a simplified mediator that carries essential information about cache events, DMA operations, and system interactions without requiring the full complexity of the original system state to be modeled and transmitted.
3Quantity of substance
If trace packets are compressed by replacing consecutive identical words with command and count, then storage efficiency improves, but the processing complexity of the trace receiver increases
Solution Approach 1:
The patent implements periodic compression where consecutive identical trace words are detected and replaced with a compact representation (command word + count). This periodic pattern recognition and replacement creates a regular, predictable compression scheme that improves storage efficiency while maintaining manageable processing complexity through systematic application of the compression rule.
Data Source
AI summary
A method repacks variable width trace data into a different packet length previous to being stored into memory. In order to conserve bandwidth, the trace data may also be compressed during transmission by eliminating the transmission of packets that have the same value.