Synchronized Trace Timestamps for Multi-Core Fault Localization

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Solution Overview

Problem

In computer systems with multiple arithmetic parts, identifying faults and ascertaining the internal state is difficult due to independent data movement without a host part, making it challenging to locate failures and understand data flow.

Innovation Solution

A computer system with trace parts recording timestamp values based on event detection, synchronized across arithmetic parts, and a host part managing these timestamp values to identify failures and manage data flow.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Productivity

If arithmetic parts independently move data without going through a host part, then data processing speed is improved, but fault identification becomes difficult

Engineering Contradiction:
Improvedata processing speedVSAvoidfault identification difficulty
Core Design Contradiction:
ProductivityVSDifficulty of detecting and measuring

Solution Approach 1:

A trace part is introduced as an intermediary component between the arithmetic parts and the host part. This trace part records trace data including timestamps and arithmetic part identifiers without interfering with the high-speed independent data movement. The recorded trace data serves as evidence that can be analyzed by the host part to identify faults and monitor system state, thus resolving the contradiction between fast independent processing and fault detectability

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The trace part performs preliminary recording of data movement information (timestamps, arithmetic part IDs, data values) as data passes through the arithmetic parts. This preliminary action captures the state of the system during operation, enabling post-event analysis of faults and performance without requiring the host part to intervene in the real-time data flow

Inventive Principle:
Principle #10Preliminary action

2Stability of the object's composition

If timestamp values are synchronized across arithmetic parts with different operating frequencies, then system coordination is improved, but timestamp value accuracy may be compromised

Engineering Contradiction:
Improvesystem coordinationVSAvoidtimestamp value accuracy
Core Design Contradiction:
Stability of the object's compositionVSMeasurement precision

Solution Approach 1:

The patent applies parameter transformation by multiplying timestamp values from arithmetic parts with different operating frequencies by appropriate coefficients. This parameter change converts timestamps from different frequency domains into a unified reference frame, enabling synchronization and comparison while preserving the original timing information's accuracy within each arithmetic part's context

Inventive Principle:
Principle #35Parameter changes

3Difficulty of detecting and measuring

If trace data is recorded for every arithmetic part, then fault identification capability is improved, but system complexity increases

Engineering Contradiction:
Improvefault identification capabilityVSAvoidsystem complexity
Core Design Contradiction:
Difficulty of detecting and measuringVSDevice complexity

Solution Approach 1:

The trace part is designed as a universal component that can be implemented in each arithmetic part with the same basic functionality. This multi-functionality approach allows standardized trace data recording across all arithmetic parts, simplifying the overall system architecture compared to having different monitoring mechanisms for each part. The unified trace data format enables centralized analysis by the host part

Inventive Principle:
Principle #6Universality (Multi-functionality)

Data Source

PatentUS12619277B2Computer system and control method therefor
Publication Date: 2026.05.05 NT T INC
  • US12619277B2 patent drawing
  • US12619277B2 patent drawing
  • US12619277B2 patent drawing

AI summary

An embodiment is a computer system which processes input data which includes a plurality of arithmetic parts; and a host part connected to the plurality of arithmetic parts and configured to control the plurality of arithmetic parts, in which the processed data is transferred between the plurality of arithmetic parts, the arithmetic part includes trace parts which record trace data using detection of a predetermined event from the input data as a trigger, the trace data has a timestamp value which is a detection time of the event based on an operating frequency of the arithmetic part, and the timestamp values of the plurality of arithmetic parts are synchronized.