Track-and-Hold Dither Injection for Time-Interleaved ADCs
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Solution Overview
Problem
Designing high-speed analog-to-digital converters (ADCs) that meet performance, power, and area requirements is challenging due to issues with timing and bandwidth mismatches between channels, leading to high power consumption and complex circuitry.
Innovation Solution
Implementing a single track and hold (T/H) circuit to drive multiple time-interleaved ADCs, using dither injection for calibration to address gain and offset mismatches, and incorporating multiplicative and additive dither to reduce power consumption and improve performance.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If multiple separate track and hold circuits are used to drive time-interleaved ADCs, then each channel can be independently optimized, but timing and bandwidth mismatches occur between channels leading to high power consumption and complex circuitry
Solution Approach 1:
The patent merges multiple separate track and hold circuits into a single shared track and hold circuit that serves multiple time-interleaved ADC channels. This consolidation eliminates timing and bandwidth mismatches between channels while reducing overall circuit complexity and power consumption, directly resolving the technical contradiction between reliability and device complexity.
2Reliability
If multiple separate track and hold circuits are used to drive time-interleaved ADCs, then each channel can be independently optimized, but power consumption increases
Solution Approach 1:
The patent consolidates multiple separate track and hold circuits into a single shared circuit that serves multiple ADC channels, thereby reducing the total number of active components and their associated power consumption. This merging approach maintains channel independence through digital calibration while significantly lowering energy usage compared to having separate circuits for each channel.
Solution Approach 2:
The patent implements digital calibration with feedback mechanisms that measure and correct gain and offset mismatches between channels. This feedback system allows the single shared track and hold circuit to maintain high reliability and channel independence by actively compensating for any mismatches, while avoiding the high power consumption of multiple separate circuits.
3Measurement precision
If digital calibration is implemented to correct gain and offset mismatches, then performance is improved, but additional circuitry and complexity are introduced
Solution Approach 1:
The patent implements digital calibration with feedback mechanisms that measure and correct gain and offset mismatches between channels. This feedback system allows the single shared track and hold circuit to maintain high reliability and channel independence by actively compensating for any mismatches, while avoiding the high power consumption of multiple separate circuits.
Solution Approach 2:
The patent replaces complex analog calibration circuitry with digital calibration techniques. By using digital signal processing to measure and correct mismatches, the system achieves high measurement precision without introducing significant additional hardware complexity, effectively substituting mechanical/analog calibration mechanisms with digital alternatives.
Data Source
AI summary
A dither capacitor, separate from the capacitor sampling the input signal, can be used to inject the additive dither in the switched-capacitor network of the track and hold circuit. This implementation can be referred to as a split-capacitor dither injection. The dither capacitor can be connected to a summing node of the switched-capacitor network. Using a separate capacitor allows the dither to be isolated from the capacitor that is sampling the input signal and avoids kick-back errors.