Tracking ADC Feed-Forward Loop for Faster Feedback Settling
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Solution Overview
Problem
Tracking ADCs face limitations in speed and accuracy due to settling time of feedback voltage, which can lead to instability and inaccuracies, especially when operating at high clock frequencies.
Innovation Solution
A tracking ADC with a feed-forward loop that uses current sources to modify the feedback signal based on threshold comparisons, anticipating the next counter value and reducing settling time by adjusting the feedback voltage by one LSB, allowing operation at higher clock frequencies without dynamic errors.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Productivity
If the ADC operates at high clock frequencies to improve speed, then productivity increases, but the feedback voltage settling time becomes insufficient leading to instability and inaccuracies
Solution Approach 1:
The patent applies preliminary action by anticipating the next counter value before the actual conversion cycle completes. The feed-forward loop predicts what the counter value will be next and pre-adjusts the feedback voltage accordingly, so that when the conversion completes, the feedback voltage is already settled and ready for the next measurement. This eliminates the settling time bottleneck and enables high-speed operation without sacrificing accuracy.
Solution Approach 2:
The patent implements dynamics by making the feedback voltage adjustment adaptive and variable rather than fixed. The feed-forward loop dynamically adjusts the feedback voltage based on the predicted counter value and the actual conversion result, allowing the system to optimize its behavior for each conversion cycle. This dynamic adjustment enables the system to maintain stability across varying operating conditions and clock frequencies.
2Measurement precision
If the feedback voltage settling time is extended to improve accuracy, then measurement precision increases, but the conversion speed decreases
Solution Approach 1:
The feed-forward loop performs preliminary adjustment of the feedback voltage by predicting the next counter value and pre-setting the feedback voltage to the appropriate level. This preliminary action ensures that the feedback voltage is already settled and accurate when the conversion cycle completes, eliminating the need for extended settling time and enabling both high speed and high precision.
Solution Approach 2:
The patent introduces an intermediary mechanism (the feed-forward loop with current sources) that mediates between the counter and the feedback voltage generation. This intermediary predicts future states and makes preemptive adjustments, acting as a buffer that decouples the speed of conversion from the settling time requirement, thereby enabling both fast conversion and accurate measurement.
3Productivity
If the feed-forward loop anticipates the next counter value to reduce settling time, then speed increases, but the complexity of the circuit increases
Solution Approach 1:
The feed-forward loop uses preliminary action to predict the next counter value and pre-adjust the feedback voltage, significantly reducing settling time and enabling high-speed operation. The added complexity is confined to the feed-forward prediction mechanism, while the core conversion architecture remains unchanged.
Solution Approach 2:
The patent changes the parameter of feedback voltage adjustment from reactive (adjusting after conversion) to proactive (adjusting before conversion based on prediction). This parameter change in the control strategy enables speed improvement with relatively modest added complexity, as it leverages the natural predictability of counter sequences.
Data Source
AI summary
A tracking ADC with a feed-forward loop is disclosed. The tracking ADC includes a feedback circuit configured to generate a feedback signal using an input voltage and a comparison circuit configured to sample, using a plurality of threshold values, the feedback signal to generate a plurality of samples. A counter circuit is configured to update a count value using a subset of the plurality of samples. A digital-to-analog converter (DAC) circuit configured to generate a control signal using the count value. The feedback circuit is further configured to modify the feedback signal using the control signal and at least one of the plurality of samples. By modifying the feedback voltage, the settling time may be reduced, allowing the ADC to be run at a higher clock speed.