Self-Adapting Tracking ADC for Wide Dynamic Range RF Power Control
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Solution Overview
Problem
Analog-to-digital converters face challenges in adapting to varying dynamic ranges and resolutions across different applications, leading to inefficiencies in tracking analogue input signals, particularly in power control loops for transmitters where dynamic power range and resolution requirements are stringent.
Innovation Solution
A self-adapting tracking analogue-to-digital converter with a controllable voltage divider and a step compensator block that dynamically switches between high and low resolution modes based on input signal levels, using a control circuit to adjust the voltage divider ratio and scaling factor, ensuring consistent processing speed and minimizing distortion.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Adaptability or versatility
If a fixed resolution ADC is used, then the circuit design is simple, but it cannot adapt to varying dynamic ranges and resolution requirements across different applications
Solution Approach 1:
The patent implements a dynamic resolution selection mechanism where the ADC can switch between different resolution modes (e.g., 6-bit, 8-bit, 10-bit) based on the input signal characteristics. A control circuit monitors the signal amplitude and dynamically adjusts the ADC resolution through switching networks that reconfigure the capacitor arrays and quantization levels, enabling the system to adapt to varying dynamic ranges while maintaining manageable circuit complexity through structured design.
Solution Approach 2:
The patent changes the resolution parameter of the ADC dynamically by modifying the effective number of bits through switching networks. The control circuit adjusts parameters such as capacitor weighting, reference voltage levels, and quantization step sizes based on the detected signal amplitude, allowing the ADC to optimize its performance for different dynamic range requirements without requiring completely different hardware designs.
2Measurement precision
If high resolution is maintained across all signal levels, then measurement precision is high, but tracking speed and processing efficiency decrease
Solution Approach 1:
The patent applies partial resolution action by using high resolution only when necessary. The control circuit detects the signal amplitude and selectively enables high-resolution mode for small-amplitude signals that require precise measurement, while switching to lower-resolution mode for large-amplitude signals where full precision is not needed. This partial application of high resolution maintains tracking speed for typical signals while providing high precision when required.
Solution Approach 2:
The patent dynamically adjusts the ADC resolution based on real-time signal characteristics. The control circuit continuously monitors the input signal amplitude and switches between resolution modes accordingly, enabling the system to maintain high tracking speed for most operating conditions while providing high measurement precision when the signal amplitude warrants it, thus optimizing the trade-off between speed and precision.
3Adaptability or versatility
If the ADC covers a wide dynamic power range, then it can handle varying signal levels, but distortion increases at signal extremes
Solution Approach 1:
The patent dynamically adjusts the ADC resolution and quantization parameters based on the detected signal amplitude. For small-amplitude signals, the system switches to high-resolution mode with finer quantization steps to maintain signal fidelity and minimize distortion. For large-amplitude signals, the system transitions to lower-resolution mode with coarser quantization steps that prevent overflow and reduce distortion at the extremes of the dynamic range, thus maintaining low distortion across the entire power range.
Solution Approach 2:
The patent changes the quantization parameter (number of bits) and reference voltage levels dynamically based on the signal amplitude. The control circuit adjusts these parameters to match the signal characteristics, ensuring that the quantization step size is appropriate for the current signal level. This parameter adaptation minimizes quantization distortion by matching the ADC's resolution to the signal's amplitude, preventing both overflow distortion and excessive quantization noise.
Data Source
AI summary
A self-adapting analogue-to-digital converter includes a forward path with a voltage divider coupled to a digital integrator. In a feedback path, a scaler is connected to a digital-to-analogue converter. A control unit provides control signals for the voltage divider and the scaler in response to the output word of the digital integrator.