Tracking Bit Cell Voltage Adjustment for Weak Memory Timing
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Solution Overview
Problem
Existing tracking circuits in memory systems often fail to cover the slower read timings of weak memory cells, as they are designed with average current values that do not account for the larger timing requirements of these cells.
Innovation Solution
Implementing a reduced operational voltage (VDDR) for tracking cells, which is adjustable and independent of process, voltage, and temperature variations, allowing it to mimic the behavior of weak memory cells and generate larger tracking timings that cover the slow timings of weak memory cells.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If tracking cells are designed with average current values, then the tracking circuit can cover typical memory cell read timings, but it fails to cover the larger timing requirements of weak memory cells
Solution Approach 1:
The patent changes the voltage parameter for tracking cells specifically, using a reduced voltage (e.g., 0.7V instead of 1.0V) to make tracking cells behave like weak memory cells. This parameter change allows the tracking circuit to generate larger tracking timings that cover weak memory cell read timings, while keeping the voltage source design simple through a fixed voltage ratio relationship with the main memory cell voltage
2Reliability
If tracking cells use reduced voltage to mimic weak memory cells, then tracking timing coverage is improved, but the voltage source design becomes more complex
Solution Approach 1:
The patent creates a universal voltage relationship where the reduced tracking voltage is derived from the same voltage source that powers the memory cells, maintaining a fixed ratio (e.g., 0.7x). This multi-functional voltage source design allows the same voltage generation circuit to serve both memory cells and tracking cells with different voltage requirements, simplifying the overall design while ensuring reliable tracking coverage across process, voltage, and temperature variations
Data Source
AI summary
A method includes determining a plurality of first current values of a first current to be sunk by a tracking cell of a tracking circuit in response to a plurality of first voltage values of a first voltage applied to the tracking cell. Each first current value of the plurality of first current values thereby corresponds to a first voltage value of the plurality of first voltage values. A second current value of a second current is determined. The second current value corresponds to a second voltage value of a second voltage of a memory cell of a plurality of memory cells. A third voltage value is selected based on the second current value, a first current value of the plurality of first current values, and a first voltage value corresponding to the first current value.