Tracking Circuit Manages 5V USB Voltage With 1.8V Transistors
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Solution Overview
Problem
As transistor sizes shrink with advancing process technology nodes, 3.3 V transistors become unsuitable for certain applications, and existing circuits face challenges in handling the voltage differences between idle and operational USB modes, particularly in managing the transition between 0 V and 5 V voltages without damaging transistors.
Innovation Solution
A tracking circuit is designed to generate different output voltage values based on input USB voltages, using 1.8 V transistors to control voltages between the gate and drain of PMOS transistors, ensuring voltages remain within a safe range, eliminating the need for special native or drain extended transistors and reducing design complexity.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Reliability
If 3.3 V transistors are used in a 3.3 V environment, then the circuit can operate at 3.3 V, but the transistors cannot handle 5 V USB voltage without damage
Solution Approach 1:
The patent introduces a tracking circuit as an intermediary between the 3.3 V transistor circuit and the 5 V USB voltage source. This tracking circuit dynamically adjusts the gate voltage of the PMOS transistor to ensure that the voltage difference between gate and drain (VGD) and gate and source (VGS) remains within safe operating limits, even when USB voltage varies from 0 V to 5 V. This mediator approach protects the 3.3 V transistor from voltage damage while enabling it to interface with 5 V USB power.
Solution Approach 2:
The tracking circuit dynamically changes the gate voltage parameter of the PMOS transistor based on the USB voltage level. When USB voltage is 0 V, the gate voltage is adjusted to one value; when USB voltage is 5 V, the gate voltage is adjusted to another value. This parameter adjustment ensures that VGD and VGS remain within acceptable ranges throughout the voltage transition, allowing the 3.3 V transistor to safely handle 5 V USB power.
2Adaptability or versatility
If native transistors with 0 V threshold voltage are used to handle 5 V USB voltage, then voltage handling capability is improved, but device complexity increases due to special transistor requirements
Solution Approach 1:
The tracking circuit enables a standard 3.3 V PMOS transistor to perform the function of handling 5 V USB voltage, which would normally require a special native transistor with 0 V threshold voltage. By adding the tracking circuit that dynamically adjusts gate voltage, the standard transistor gains the capability to safely interface with 5 V USB power, eliminating the need for special native transistors and reducing device complexity.
3Area of moving object
If transistor size is shrunk to advance process technology nodes, then integration density is improved, but operational voltage decreases making 3.3 V transistors unsuitable
Solution Approach 1:
The tracking circuit serves as a mediator that bridges the gap between the low operational voltage of shrunk transistors and the higher 5 V USB voltage. By dynamically adjusting the gate voltage of the PMOS transistor, the tracking circuit ensures that the voltage differences VGD and VGS remain within the safe operating range of the shrunk transistor, enabling small transistors to interface with 5 V USB power without damage.
Data Source
AI summary
A circuit includes a supply voltage node having a supply voltage value and a node having a node voltage, the node voltage having a node voltage value higher than the supply voltage value. A current generating circuit is coupled between the supply voltage node and the node and is configured to generate a current, and a tracking circuit electrically coupled to the node is configured to selectively supply the current to the node based on the node voltage.