Tracking Voltage Reference Circuit for Fast Receiver Startup
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Solution Overview
Problem
In single-ended AC-coupled communication receivers, the startup time is often prolonged due to the need for DC balance, leading to higher receiver jitter and ripple, as existing RC filters struggle to balance the tradeoff between startup speed and ripple, especially in protocols like common-mode eARC communication channels.
Innovation Solution
The proposed solution involves a communication receiver that detects peak high and low pulses, averages these values to generate a reference voltage for a comparator, and uses a dual RC filter mechanism to control the relaxation of the peak detection circuit, allowing for faster startup with reduced ripple by tracking the DC component as it settles.
Engineering Contradictions & Design Principles
Engineering Contradiction Analysis
1Measurement precision
If a traditional RC filter is used to extract the DC component, then the reference voltage is obtained, but the startup time increases and ripple increases leading to higher receiver jitter
Solution Approach 1:
The patent divides the reference voltage generation into two separate circuits: a peak detection circuit that tracks the DC component rapidly, and an RC filter that reduces ripple. These two circuits are segmented to perform different functions simultaneously, allowing fast startup while maintaining reference voltage accuracy.
Solution Approach 2:
The patent combines the output of the peak detection circuit and the RC filter through an averaging mechanism. The peak detection provides fast tracking of DC changes, while the RC filter provides ripple reduction. By merging these two approaches, the system achieves both fast startup and low jitter performance.
2Speed
If the RC filter time constant is reduced to decrease startup time, then faster response is achieved, but ripple increases leading to higher receiver jitter
Solution Approach 1:
The patent segments the ripple reduction function from the response speed function by using two separate circuits. The peak detection circuit handles fast response with minimal ripple, while the RC filter handles additional ripple reduction. This segmentation allows each circuit to be optimized for its specific function without compromising the other.
Solution Approach 2:
The peak detection circuit acts as an intermediary between the input signal and the final reference voltage. It provides a preliminary DC component extraction that is then further filtered by the RC circuit, mediating between the need for fast response and the need for low ripple.
3Object-generated harmful factors
If the RC filter is made more aggressive to reduce ripple, then receiver jitter decreases, but startup time increases
Solution Approach 1:
The patent segments the startup function from the ripple reduction function. The peak detection circuit is optimized for fast startup and tracks DC component changes rapidly, while the RC filter is optimized for ripple reduction. This segmentation allows the RC filter to be more aggressive without compromising startup time, since the peak detection circuit compensates for any delay.
4Measurement precision
If the system waits for DC balance to be reached, then the reference voltage is accurate, but the startup window is exceeded in protocols like eARC
Solution Approach 1:
The peak detection circuit performs preliminary DC component extraction before the system reaches full DC balance. It actively tracks the DC component as it settles, providing an accurate reference voltage earlier than traditional methods would allow, thus meeting startup window requirements while maintaining accuracy.
Solution Approach 2:
The patent implements feedback through the peak detection circuit that continuously monitors and tracks the DC component as it settles. This feedback mechanism allows the reference voltage to adapt and remain accurate throughout the startup process, rather than requiring static waiting for DC balance.
Applied Scientific Principles
This section explains which scientific principles are used to turn an abstract innovation direction into a practical engineering solution.
Function Achieved in This Case
This approach enables a faster startup time with lower ripple, achieving reasonable reference values with fewer input data points and providing greater noise margins by damping the ripple in the VREF_TRACK signal, thus addressing the tradeoff between startup speed and jitter.
Implementation Method 1
A typical circuit that extracts the DC component of a switching signal uses an RC filter
Implementation Method 2
The filter also requires a representative density of positive and negative pulses to accurately render an average
Data Source
AI summary
A receiver includes an input node coupled to receive an analog signal, a first switch coupled between the input node and a first node, a second switch coupled between the input node and a second node, a first resistive element coupled between the first node and a reference node, a second resistive element coupled between the second node and the reference node, a first capacitive element coupled to the first node, and a second capacitive element coupled to the second node. The receiver also includes a comparator having a first input coupled to the input node to receive the analog signal, and a second input coupled to the reference node to receive a reference voltage, wherein an output of the comparator controls the first and second switches.