Tracking Word Line Driver Circuit for SRAM Write Assist

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Solution Overview

Problem

Writing data to Static Random Access Memory (SRAM) is challenging at 'difficult' transistor speed, voltage, and temperature corners, particularly when transistors are SS or SF, due to differences in driving capabilities and operational voltages, leading to difficulties in flipping data effectively without compromising operational frequencies.

Innovation Solution

The implementation of a tracking word line driver circuit with additional circuitry that generates a word line signal with a larger pulse width, utilizing a tracking word line driver that includes a transistor with increased P-side driving capability to delay the rising and falling edges of the word line signal, thereby increasing the pulse width and improving write times at difficult corners without reducing operational frequencies.

Engineering Contradictions & Design Principles

VSEngineering Contradiction Analysis

1Reliability

If the pulse width of the word line is increased to improve data writing at difficult corners, then the write time is improved, but the operational frequency is reduced

Engineering Contradiction:
Improvewrite capability at difficult cornersVSAvoidoperational frequency
Core Design Contradiction:
ReliabilityVSSpeed

Solution Approach 1:

The tracking word line driver circuit performs preliminary action by extending the word line pulse width specifically during write operations at difficult corners (SS/SF conditions). The circuit monitors write conditions and selectively extends the pulse width only when needed, rather than continuously extending it for all operations. This allows the system to prepare adequate write time when required while maintaining normal operational frequencies for standard operations.

Inventive Principle:
Principle #10Preliminary action

Solution Approach 2:

The tracking word line driver circuit introduces dynamic adjustment of the word line pulse width based on real-time operating conditions. The circuit dynamically extends the pulse width when detecting difficult corner conditions (SS/SF transistors, specific voltage/temperature combinations) and maintains normal pulse widths for standard operations. This dynamic adaptation resolves the contradiction by making the pulse width flexible rather than fixed.

Inventive Principle:
Principle #15Dynamics

2Reliability

If additional circuitry is added to extend word line pulse width, then write capability at difficult corners is improved, but device complexity increases

Engineering Contradiction:
Improvewrite capability at SS/SF cornersVSAvoidcircuit complexity
Core Design Contradiction:
ReliabilityVSDevice complexity

Solution Approach 1:

The tracking word line driver circuit acts as an intermediary component between the standard word line driver and the memory cell. This intermediary circuit receives the standard word line signal and conditionally extends its pulse width based on detected operating conditions. By placing this intermediary layer, the patent adds complexity only where needed (in the tracking driver) while leaving the rest of the memory system unchanged, thus minimizing overall device complexity increase.

Inventive Principle:
Principle #24Intermediary (Mediator)

Solution Approach 2:

The patent applies local quality by implementing the pulse width extension functionality only in the tracking word line driver circuit, which is specifically designed to handle difficult corner conditions. Rather than modifying the entire memory system or all word line drivers, the solution locally enhances only the critical path for write operations at SS/SF corners. This localized approach minimizes the increase in overall device complexity while effectively solving the specific write capability problem.

Inventive Principle:
Principle #3Local quality

Data Source

PatentUS9269424B2Method of operating write assist circuitry
Publication Date: 2016.02.23 TAIWAN SEMICONDUCTOR MANUFACTURING CO LTD
  • US9269424B2 patent drawing
  • US9269424B2 patent drawing
  • US9269424B2 patent drawing

AI summary

A method includes causing, by a first circuit, a first signal transition at a first node based on a clock signal. A first edge, from a first level to a second level, of a word line signal is generated responsive to the first signal transition. A second signal transition at a second node is caused by a second circuit based on the clock signal. The second circuit and the first circuit are configured to cause the second signal transition to occur later than the first signal transition by a delay time. A first edge, from a third logic level to a fourth level, of a tracking word line signal is generated responsive to the second signal transition.